Specifications

QSSC-S4R Technical Product Specification BIOS Initialization
133
Bit[7:0]
0x80 "LLC Array Error"
0x81 "Tag Array Error"
0x82 "State/Core valids Array Error"
0x83 "LRU Array Error"
0x84 "Protocol Error"
0x85 "Tag multi-hit Error"
0x86 "CAMD programming Error"
0x87 "CAMD MCA Error"
0x88 "COH/RSP TruthTable error"
0x89 "MAF Timeout Error"
0x8A "Multiple MAF entries PA matched"
0x8B "Corrected PrefetchHint to non-coherent error"
0x8F "Non-pipeline related Parity Error"
E
v
ent Data 2
Bits[7:0] Reserved
E
v
ent Data 3
Bits[7:5] CPI Socket number. Refer to Table 86 Device Locator Nomenclature
Bits[4:2] Core Number (Cbox)
000b “CORE_0”
001b “CORE_1”
010b “CORE_2”
011b “CORE_3”
100b “CORE_4”
101b “CORE_5”
110b “CORE_6”
111b “CORE_7”
Bits [1:0]
Reserved
Uncorrectable error SEL format
Sensor
Number
Sensor T
y
pe
Code
E
v
ent/Reading T
y
pe Description
0x1D 0x07 0x7D Uncorrectable Core error
Fatal error SEL format
Sensor
Number
Sensor T
y
pe
Code
E
v
ent/Reading T
y
pe Description
0x1E 0x07 0x7E Fatal Core error
The Event Data bytes 1, 2 and 3 are common for all the Core errors.
16.2 Memory
The Intel® Xeon® 7500 processor has two Integrated Memory Controllers (IMC). Each IMC represents one Branch.
Each Branch is routed to a memory board socket and consists of two Intel ® Scalable Memory Interconnect (SMI)
links. Each SMI link goes to an Intel® Scalable Memory Buffer (Millbrook) device. The Intel® Scalable Memory Buffer
is an on-board memory buffer on the memory riser/board. The memory board hosts two Intel® Scalable Memory
Buffers. Each Intel® Scalable Memory Buffer takes one SMI link and produces two DDR3 Channels. Each DDR3
channel supports two DIMMs. This means that each memory board supports a maximum of eight (8) DIMM sockets.
Since each branch supports one memory board, each CPU can support a maximum of 16 DIMMs on two memory
boards connected to the two branches off that CPU. Thus, the QSSC-S4R platform can support a total of 64
[4(sockets) x 16(DIMMs per socket)] DDR-3 DIMMs max in a quad socket configuration.