Specifications

BIOS Initialization QSSC-S4R Technical Product Specification
132
x Turbo Boost operates under OS control – it is only entered when the OS requests the highest (P0) performance
state.
x Turbo Boost operation can be enabled or disabled by BIOS.
x Turbo Boost converts any available power and thermal headroom into higher frequency on active cores. At
nominal marked processor frequency, many applications consume less than the rated processor power draw.
x Turbo Boost availability is independent of the number of active cores.
x Maximum Turbo Boost frequency is dependent on the number of active cores and varies by processor
configuration.
x The amount of time the system spends in Turbo Boost operation depends on workload, operating environment,
and platform design.
If the processor supports Intel® Turbo Boost Technology feature, the BIOS Setup provides an option to enable or
disable this feature. The default state is “enabled”. Turbo Mode will be disabled if Enhanced Speed Step Mode is
disabled or not supported.
16.1.22 Acoustical Fan Speed Control
The processors implement a methodology for managing processor temperatures that supports acoustic noise reduction
through fan speed control. The temperature used to regulate the fans is calculated using the following two components:
Tcontrol offset and Tcontrol base. The BMC is responsible for the following functionality:
x Getting the Tcontrol base from the sensor data records
x Retrieving the Tcontrol offset directly from the processor using PECI.
16.1.23 CPU Core Error Handling
CPU core corrected error handling is done by CMCI and uncorrected, fatal error handling is done by MCE. ONLY BIOS
will be logging SEL for the corresponding CPU error.
16.1.23.1 Correctable Error Handling
There is no threshold value for core errors. Only Memory (MBox) supports correctable error threshold. Intel
®
Xeon
®
Processor 7500 generates a notification to the BIOS for every Correctable error detected.
16.1.23.2 Uncorrectable Error Handling
The BIOS programs the Intel® Xeon® 7500 processor for reporting uncorrectable errors to BIOS via SMI whenever an
uncorrectable error occurs. OS may handle the error once BIOS exits the SMI and would generate a Blue screen or a
system hang.
BIOS SMI handler will take below actions for uncorrectable errors
1. The BIOS logs an Uncorrectable SEL entry to BMC.
2. While the normal behavior when a fatal error occurs is to generate an NMI, if it so happens that the BIOS SMI
handler gets corrupted, the SMI# pin will be driven low. If this signal is held low for a given timeout the BMC will log
a SEL event (CATERR) and reset the server.
16.1.24 Cbox Error Records
Table 81. Format of Cbox Error SEL Records
Sensor
Number
Sensor T
y
pe
Code
E
v
ent/Reading T
y
pe Description
0x1C 0x07 0x7C Correctable Core error
E
v
ent Data 1