Specifications

QSSC-S4R Technical Product Specification BIOS Initialization
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16.1.15 Enhanced Halt State (C1E)
All processors support the Halt State (C1) through the native processor instructions HLT and MWAIT. Some
processors implement an optimization of the C1 state called the Enhanced Halt State (C1E) to further reduce the total
power consumption while in C1. When C1E is enabled, and all logical processors in the physical processors have
entered the C1 state, the processor reduces the core clock frequency to minimum system bus ratio and VID. The
transition of the physical processor from C1 to C1E is accomplished similar to an Enhanced Intel® SpeedStep
Technology transition. If the BIOS determine that all the system processors support C1E, then it is enabled.C1E will be
enabled by default if processor supports.C1E is disabled if C State option is disabled in BIOS setup.
16.1.16 Hardware Prefetcher
The automatic hardware prefetcher operates transparently without requiring programmer‘s intervention. It is triggered
by regular access patterns and helps predict future access, thereby overlapping memory latency with computation. By
enabling concurrency between memory accesses and computation, the computational benefit of higher processor
frequencies is maximized.
16.1.17 Adjacent Cache Line Prefetch
Cache lines can be fetched one at a time, or by enabling Adjacent Cache Line Prefetch, the cache lines can be fetched
in pairs. This can be helpful if the data to be used continues to the next cache line, causing less cache misses to
maximize throughput.
When the data is not in adjacent lines, then performance can be slowed, since there are more cache misses and more
time is spent filling the cache lines.
16.1.18 Multi-Core Processor Support
The BIOS does the following:
x Initializes all processor cores.
x Installs all NMI handlers for all processor cores.
x Leaves initialized AP in a processor-specific low C-state. For the Intel® Xeon® 7500 processor, this is the lowest
supported C-state (C3).
x Initializes stack for all APs.
The BIOS setup provides the ability to selectively enable one or more cores. The default behavior is to enable all cores.
This is done through the BIOS setup option for active core count.
16.1.19 Intel® Virtualization Technology
Intel® Virtualization Technology is designed to support multiple software environments sharing same hardware
resources. Each software environment may consist of OS and applications. Intel® Virtualization Technology can be
enabled or disabled in BIOS Setup. The default behavior is disabled.
Note: If the setup options are changed to enable or disable the virtualization technology setting in the processor, the user must
perform an AC power cycle before the changes take effect.
16.1.20 Direct Cache Access (DCA)
Direct Cache Access (DCA) is a system-level protocol in a multi-processor system to improve I/O network
performance, thereby providing higher system performance. The basic idea is to minimize cache misses when a
demand read is executed. This is accomplished by placing the data from the I/O devices directly into the processor
cache through hints to the processor to perform a data pre-fetch and install it in its local caches. The Intel® Xeon®
7500 processor supports Direct Cache Access (DCA).
16.1.21 Intel® Turbo Boost Technology
Intel® Turbo Boost Technology is featured on certain processors in the Intel® Xeon® 7500 Processor Series. Intel®
Turbo Boost Technology opportunistically and automatically allows the processor to run faster than the marked
frequency if the processor is operating below power, temperature, and current limits. This results in increased
performance for both multi-threaded and single-threaded workloads.
Intel® Turbo Boost Technology operation: