Specifications

QSSC-S4R Technical Product Specification Power Distribution Board (PDB)
117
13.3.2 Cold Redundancy Functional Description
The circuit always enables at least one power supply module once system PS_ON (PS_Enable) signal is generated.
The number of enabled modules depends on the power consumed by the system and active modules status. The PDB
monitors output power level via current share bus and enables other installed power supplies based on a condition that
maximum power subsystem efficiency would be guaranteed at any given power level. Refer to Figure 56. PDB
Functional Block Diagram and/or the Cold Redundancy Circuit Block Diagram in the following figure.
Figure 57. Cold Redundancy Circuit Block Diagram
Each of the PWOK signals is coupled to the Control logic block inputs. The cold redundancy logic (CRL)
generates enable (PS_ON) signals for each of PS modules: PS1 POK lost event (fault) enables PS2-PS4
modules, PS2 fault signal enables PS1, PS3, PS4 modules, etc. The CRL monitors power consumed by the
system at any given moment (via PMBus or current share bus and the number of asserted POK signals) and
enables a number of modules providing maximum power subsystem efficiency at any given consumed power
level.