Product specifications

IB6054601-00 H E-1
E Write Combining
Introduction
Write combining improves write bandwidth to the QLogic chip by writing multiple
words in a single bus transaction (typically 64 bytes). Write combining applies only
to x86_64 systems.
The x86 Page Attribute Table (PAT) mechanism that allocates Write Combining
(WC) mappings for the PIO buffers has been added and is now the default.
If PAT is unavailable or PAT initialization fails, the code will generate a message in
the log and fall back to the Memory Type Range Registers (MTRR) mechanism.
If write combining is not working properly, lower than expected bandwidth may
occur.
The following sections provide instructions for checking write combining and for
using PAT and MTRR.
Verify Write Combining is Working
To see if write combining is working correctly and to check the bandwidth, run the
following command:
$ ipath_pkt_test -B
With write combining enabled, the QLE7140 and QLE7240 report in the range
of 1150–1500 MBps. The QLE7280 reports in the range of 1950–3000 MBps. The
QHT7040/7140 adapters report in the range of 2300–2650 MBps.
You can also use ipath_checkout (use option 5) to check bandwidth.
Although the PAT mechanism should work correctly by default, increased latency
and low bandwidth may indicate a problem. If so, the interconnect operates, but in
a degraded performance mode, with latency increasing to several microseconds,
and bandwidth decreasing to as little as 200 MBps.
Upon driver startup, you may see these errors:
ib_ipath 0000:04:01.0: infinipath0: Performance problem: bandwidth
to PIO buffers is only 273 MiB/sec
.