Specifications

TBPHSHR (8) Reserved (8)

TBPHS (16)

0x0002

0x0003

Reserved (8)

TBPHSHR (8)TBPHS (16)

31 16 15 8 7 0

Single 32 bit write

Reserved (8)

CMPA (16)

CMPAHR (8)0x0008

0x0009

Single 32 bit write

CMPA (16)

CMPAHR (8) Reserved (8)

16 15 8 7 0

Operational Description of HRPWM

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Table 2. HRPWM Registers

mnemonic Address Offset Shadowed Description

TBPHSHR 0x0002 No Extension Register for HRPWM Phase (8 bits)

CMPAHR 0x0008 Yes Extension Register for HRPWM Duty (8 bits)

HRCNFG

(1)

0x0020 No HRPWM Configuration Register

(1)

This register is EALLOW protected.

2.1 Controlling the HRPWM Capabilities

The MEP of the HRPWM is controlled by two extension registers, each 8-bits wide. These two HRPWM

registers are concatenated with the 16-bit TBPHS and CMPA registers used to control PWM operation.

• TBPHSHR - Time Base Phase High Resolution Register

• CMPAHR - Counter Compare A High Resolution Register

Figure 3. HRPWM Extension Registers and Memory Configuration

HRPWM capabilities are controlled using the Channel A PWM signal path. Figure 4 shows how the

HRPWM interfaces with the 8-bit extension registers.

High-Resolution Pulse Width Modulator (HRPWM) SPRU924F– April 2005– Revised October 2011

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