Specifications

Trip-Zone Submodule Control and Status Registers www.ti.com
Figure 4-20. Trip-Zone Enable Interrupt Register (TZEINT)
15 8
Reserved
R -0
7 3 2 1 0
Reserved OST CBC Reserved
R-0 R/W-0 R/W-0 R-0
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 4-20. Trip-Zone Enable Interrupt Register (TZEINT) Field Descriptions
Bits Name Value Description
15-3 Reserved Reserved
2 OST Trip-zone One-Shot Interrupt Enable
0 Disable one-shot interrupt generation
1 Enable Interrupt generation; a one-shot trip event will cause a EPWMx_TZINT PIE interrupt.
1 CBC Trip-zone Cycle-by-Cycle Interrupt Enable
0 Disable cycle-by-cycle interrupt generation.
1 Enable interrupt generation; a cycle-by-cycle trip event will cause an EPWMx_TZINT PIE
interrupt.
0 Reserved Reserved
Figure 4-21. Trip-Zone Flag Register (TZFLG)
15 8
Reserved
R-0
7 3 2 1 0
Reserved OST CBC INT
R-0 R-0 R-0 R-0
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 4-21. Trip-Zone Flag Register (TZFLG) Field Descriptions
Bits Name Value Description
15-3 Reserved Reserved
2 OST Latched Status Flag for A One-Shot Trip Event
0 No one-shot trip event has occurred.
1 Indicates a trip event has occurred on a pin selected as a one-shot trip source.
This bit is cleared by writing the appropriate value to the TZCLR register.
Registers 112 SPRU791F – November 2004 – Revised July 2009
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