User`s guide

208 DC 900-1340I
BSC Programmer’s Guide
A.9 Clock Signals
The BSC communication interface is designed to use either externally or internally gen-
erated clock signals. Clocking is selected through the clock source option (Section 4.2
on page 89). The BSC software always uses receive clocking provided by the receive data
source. Under external clocking, BSC receives its transmit clocks from the remote com-
puter. Under internal clocking, the transmit clock is internally generated and also out-
put to the remote computer. For internal clocking on the Freeway 2000/4000, the
hardware clock jumper for each link must be set as described in the Freeway
ICP6000R/ICP6000X Hardware Description manual. If you need to set internal clocking,
call the Protogate customer support number given in the Preface. For the Freeway 1000,
refer to the ICP2424 Hardware Description and Theory of Operation.
Ta ble A –4 defines the EIA-232 clock signals used by the BSC software.
A.10 Idle Line Condition
When no data is being transmitted on a full-duplex circuit, the transmit line is held in
a marking condition (all one-bits are transmitted).
Table A– 4: EIA-232 Clock Signals
Signal Pin Direction Description
XMT CLK 15 Input External clocking: transmit clock
Internal clocking: not used
RCV CLK 17 Input External clocking: receive clock
Internal clocking: receive clock
EXT CLK 24 Output External clocking: not used
Internal clocking: server-generated
Clock signal to be connected to the XMT CLK of
the local interface and the RCV CLK pin of the
remote interface.