Specifications

System Diagnostics
The routine derives the beep code from the test point error as follows:
1. The 8-bit error code is broken down to four 2-bit groups (Discard the most significant
group if it is 00).
2. Each group is made one-based (1 through 4) by adding 1.
3. Short beeps are generated for the number in each group.
Example:
Test point 01Ah = 00 01 10 10 = 1-2-3-3 beeps
The table below lists the checkpoint codes written at the start of each test and the beep codes
issued for terminal errors.
Table 7-2: POST Beep Codes
Code Beep POST routine description
02h Verify Real Mode
03h Disable Non-Maskable Interrupt (NMI)
04h Get CPU type
06h Initialize system hardware
07h Disable shadow and execute code from the ROM
08h Initialize chipset with initial POST values
09h Set in POST flag
0Ah Initialize CPU registers
0Bh Enable CPU cache
0Ch Initialize caches to initial POST values
0Eh Initialize I/O component
0Fh Initialize the local bus IDE
10h Initialize power management
11h Load alternate registers with initial POST values
12h Restore CPU control word during warm boot
13h Initialize PCI bus mastering devices
14h Initialize keyboard controller
16h 1-2-2-3 BIOS ROM checksum
17h Initialize cache before memory auto size
18h 8254 timer initialization
1Ah 8237 DMA controller initialization
1Ch Reset Programmable Interrupt Controller
continued
7-4 HP ProLiant ML110 Server Operations and Maintenance Guide