User guide

Data Sheet
E1- Attachment
E1 Attachment for 4FTR and LCPU
- SDH/PDH master / DVS-21 slave operation
Example 3: Clock extraction from a DVS-21. One device is master, the others are in slave mode.
Two DVS-21 systems are combined together over a modem line and an XMP1. One
DVS-21 generates the clock signal to which the XMP1 and the second DVS-21
synchronize.
The clocking concept is controlled by the CPU1 in each DVS-21. In order for the
system to synchronize to an external clock signal or an HDB3 signal all that is
required is a jumper on the backplane.
The Symbols on the Front Plate and their Meaning (4FTR / LCPU):
The System Blinker
Addressing from processor taking place
I/O Input/Output
BUS output works as push-push operation with the system blinker
BUS in
p
ut works as
p
ush-
p
ull o
p
eration with the s
y
stem blinke
r
On LF Connection Established
A minimum of one of 30 possible LF connections has been
established
(
card set related dis
p
la
y)
Al No Receiver Found (No Connection)
(card set related display)
Receiving: Data Frame to E1 Interface
(
card set related dis
p
la
y)
Date:
19.03.2009
Page:
5/7
Author:
HS
Document-No.:
DB_E1_ 2861_01
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