Specifications
Zylogic ZE5 Configurable System-on-Chip Platform
www.Zylogic.com.cn 70
JTAG-initiated condition is cleared once the com-
mand is no longer asserted.
J
J
T
T
A
A
G
G
R
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t
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For debugging purposes, the JTAG unit can force
a System Reset or an MCU Reset event. There
are three reset-related commands that can be is-
sued via the JTAG unit.
1. J_RESET resets the MCU.
2. FORCE_BRST resets everything except the
clock control registers and the JTAG unit.
3. FORCE_NOBRST disables the RST- pin, pre-
venting the pin from causing a reset event.
This function overrides FORCE_BRST.
A
A
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p
p
l
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a
a
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o
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n
R
R
e
e
s
s
e
e
t
t
v
v
i
i
a
a
R
R
S
S
T
T
C
C
S
S
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d
d
e
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b
b
a
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d
d
S
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g
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l
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The reset input to the 8032 “Turbo” microcontroller
is supplied via an active-High sideband signal
called RSTC. When asserted, RSTC resets the
MCU but no other peripherals or system-related
resources. The RSTC sideband signal is usually
supplied by functions in the CSL matrix or from a
PIO pin.
W
W
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The 8032 “Turbo” microcontroller contains a
watchdog timer, typically used to insure proper
system operation. The Watchdog timer is a free
running timer with programmable time-out intervals.
The user’s software can clear the watchdog timer
at any time causing it to restart the count. When
the timer reaches its time-out interval, an interrupt
flag is set. If the Watchdog reset is enabled then
the watchdog timer generates a reset under the
following condition.
1. If the watchdog timer reset is enabled by set-
ting EWT (WDCON.1).
2. When the watchdog timer reaches its time-out
count.
3. If the application software does not reset the
Watchdog timer by setting the RWT bit
(WDCON.0) within 512 clock cycles after time-
out.
A watchdog timer reset only resets the MCU. The
reset condition is maintained by hardware for two
machine cycles.
S
S
y
y
s
s
t
t
e
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m
m
B
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h
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a
a
v
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i
i
o
o
r
r
a
a
f
f
t
t
e
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r
r
a
a
R
R
e
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s
s
e
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t
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E
E
v
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n
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After a reset event, the system either re-initializes
and re-starts code execution or just re-starts code
execution, depending on the type of reset event.
R
R
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-
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Following some types of resets, as shown in Table
39, the CSoC starts or re-starts the device initiali-
zation process. The initialization process, de-
scribed separately in the "System Initialization"
section, typically lasts tens to hundreds of millisec-
onds, depending on the CSoC clock source and
the operating mode. After the ZE5 is fully initial-
ized, the user application program begins execut-
ing from microcontroller address 0000h.
A
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M
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U
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After resetting the MCU, the MCU starts or re-
starts executing the user application program from
8032 code location 0000h. There are no other
implications of an MCU Reset. An MCU Reset
event does not cause the device to re-initialize.
M
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Table 40. SFR Reset Conditions.
SFR Name Reset Value
ACC 00000000b
B 00000000b
CKCON 00000001b
DPH 00000000b
DPH1 00000000b
DPL 00000000b
DPL1 00000000b
DPS 00000000b
EIE 11101111b
EIP 11101111b
IE 01000000b
IP 11000000b
P0 11111111b
P1 11111111b
P2 11111111b
P3 11111111b
PC 0000h
PCON 00110000b
PSW 00000000b
RCAP2H 00000000b
RCAP2L 00000000b
SADDR 00000000b
SADEN 00000000b
SBUF 11111111b
SCON 00000000b
SP 00000111b
T2CON 00000000b
T2MOD 11111110b
TA 11111111b