Specifications

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Mappers respond to accesses within a selectable
zone of logical addresses. The zones refer to a
range of addresses. The zone size is a power of
two with a minimum size of 256 bytes and a maxi-
mum of 64K bytes. A zone starts on any logical
address boundary that is a multiple of its size.
When an address match occurs between an 8032
address and an address mapper zone, the MCU‘s
logical address is translated to a physical CSI bus
address.
0xFFFF 0xFFFF
0
External
Program
Memory
0
External
Data
Memory
(XDATA)
0xFF 0xFF
0x80
Indirect
Internal
RAM
0x80
Internal and
Exported
SFRs
0x7F
0
Direct
Internal
RAM
Figure 34. 8032 microcontroller address
spaces.
Primary
Initialization
Code ROM
0
0xFFFF
Internal
RAM
0x1_0000
0x1_FFFF
Config. Reg.
Unit (CRU)
0x2_0000
0x2_FFFF
CPU Debug
Registers
0x3_0000
0x3_FFFF
Initialization
Memory
0x4_0000
0x7_FFFF
Reserved
0x8_0000
0x9_FFFF
CSL-based
"Soft"
Module
Registers
decoded via
Selectors
0x10_0000
0x7F_FFFF
0xFF_FFFF
0x80_0000
DMAP0
DMAP1
DMAP2
DMAP3
DMAP4
DMAP5
CMAP0
CMAP1
CMAP2
0
0xFFFF
CRU
XDATA RAM
"Soft"
Modules
User Code
0
0xFFFF
Data Mappers
Code Mappers
0xFF
0x80
xdata
code
sfr
XMAP
SFR Export
Mapper
User Code
Init. Code,
Data, +
Header
32-bit
Physical
Memory
8032 Logical
Memory Spaces
Primary initialization
code is only visible
after power-on or RST-
DMAP5 available
for user applications
CMAP2 available
for user applications
Initialization code, data, and
header always in last 256
Kbytes, aligned to 16K
boundary
FastChip able to export some
SFR locations
0
0x3_FFFF
Initialization
Code, Data, +
Header
User Code
External
Memory
Secondary initialization
program copies initialization
data from external memory into
initialization memory within E5,
after power-on or RST-
Example memory map
after initialization
Example memory map
after initialization
Mappers shown by
priority, top to bottom
Mappers shown by
priority, top to bottom
Single code-bank
applications fit in a 256Kx8
memory. Initialization code
always appears at the top of
memory, code at the bottom.
Memory Interface Unit
SFRs
Similar to original
8051/52
Physical memory map automatically created by FastChip
CMAP1 points to
the MIU if operating
from Flash. Else
points to internal
RAM.
Figure 35. The Zylogic FastChip development system uses the internal code and data mappers
to automatically create a 16M-byte memory map.