Specifications

33 www.zylogic.com.cn
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Output signals can be optionally inverted within the
PIO, and can pass directly to the pad or be stored
in an edge-triggered output flip-flop.
A logical Low on the Output-Enable signal forces
the output into a high-impedance state. Conse-
quently, a PIO functions as a three-state output or
bi-directional I/O. Conversely, a logical High en-
ables the output buffer. Under configuration con-
trol, the Output and Output-Enable signals can be
inverted. The polarity of these signals is inde-
pendently configured for each PIO. In addition,
each can be tied High or Low independently.
The outputs on each PIO are full CMOS outputs.
The switching threshold is a product of the I/O
supply voltage (VIO).
Although the ZE5’s output supply is 3.3 volts, each
output is capable of driving a standard 5-volt TTL
output levels. Most 5-volt CMOS devices recog-
nize HCT (TTL level) inputs.
An output can be configured as open-drain (open-
collector) by tying the output path to ground and
driving the output-enabled signal, OE. However,
the voltage applied to the pin should never exceed
the values defined for VIO.
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Each PIO has selectable output drive current, ca-
pable of sinking either 4 mA or 12 mA, as shown in
Table 14. Reduced drive current results in lower
power consumption, lower EMI emissions and
lower ground bounce.
Table 14. Output Drive Current Options.
Output Current
Mode
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Low drive (default) -4.0 +2.0 mA
High drive -12.0 +6.0 mA
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There are a number of other programmable op-
tions available for PIO blocks.
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The BusMinder feature allows each PIO to have an
optional
 Pull-up resistor (pulls undriven inputs High)
 Pull-down resistor (pulls undriven inputs Low)
 Weak follower (forces undriven inputs to the
last value that appeared on the bus)
Zylogic ZE5 configurable system-on-chip devices
are fabricated on leading-edge CMOS processes.
Like all CMOS devices, input pins should never be
left floating. An unused input might float unless
tied to High or Low. In addition, an input con-
nected to a bi-directional bus might float if the bus
is three-stated (high impedance).
The BusMinder’s programmable pull-up/pull-down
resistor and weak follower are useful for tying un-
used or floating pins High or Low to minimize
power consumption and reduce noise sensitivity.
The configurable pull-up resistor is a p-channel
transistor that pulls to VCC. The configurable pull-
down resistor is an n-channel transistor that pulls
to Ground. The value of these resistors is 50 kΩ to
100 kΩ. This high value makes them unsuitable
as wired-AND pull-up resistors.
The pull-up resistors for PIOs are active during the
initialization process. This pulls all as-yet-
unprogrammed PIOs High, preventing them from
floating. Devices connected to the PIO see a logi-
cal One. Other devices driving into the PIO can
easily overdrive the weak pull-up resistor.
After initialization, voltage levels of unused pads,
bonded or unbonded, must be valid logic levels, to
reduce noise sensitivity and avoid excess current.
Therefore, by default, unused pads are configured
with the internal pull-up resistor active.
The weak follower is used on PIOs that connect to
a bi-directional bus. Instead of pulling the floating
input High or Low, the weak follower remembers
the last value that appeared on the bus before the
bus signal was three-stated.
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The Zylogic ZE5 device can be placed into power-
down mode by setting the PD bit (PCON.1) in the
Power Control register. While in power-down
mode, each PIO pin can optionally be configured
for low-power operation. The PIO bit (PWDSEL.5)
bit must be set before entering power-down mode
to enable low-power mode.
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If enabled for low-power operation, a PIO output is
disabled during power-down mode. A disabled
PIO output is forced into a high-impedance state.
The BusMinder function switches to weak follower
mode, regardless if configured for a pull-up or pull-
down resistor or left floating. The weak follower
function keeps the PIO at the voltage level last ap-
plied to the pin. This helps to reduce overall power
consumption.
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Likewise, a PIO input can be enabled for low-
power operation. A PIO input is optionally forced
Low during power-down mode.