Specifications

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Programmable Input/Output (PIO) Pins
Programmable input/output blocks (PIOs) interface
external package pins to internal functions such as
the microcontroller, its peripherals, and the CSL
matrix. Each PIO connects to a bonding pad,
which may or may not attach to an external pack-
age pin. Each PIO can be configured an input, an
output, or a bi-directional signal, as shown in
Figure 27.
C
C
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P
P
I
I
O
O
P
P
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M
M
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Unlike the original 8032, the Zylogic ZE5 offers
nearly unparalleled I/O flexibility. Each of the con-
figurable system-on-chip's PIO pins optionally con-
nects to the processor via the CSI bus or works
independently in unassociated CSL logic functions.
Connecting a group of PIOs to the processor re-
quires CSI socket resources, including connec-
tions to the Data Read and Data Write busses,
plus one or two address selectors.
The original 8032 has up to four byte-wide pro-
grammable I/O ports. The external memory inter-
face typically consumes two of the 8032's ports
(Ports 0 and 2), leaving just two byte-wide ports or
16 individual signals. Furthermore, some port sig-
nals have shared functionality. For example, the
Timer 1 external input (T1) shares a Port 3 pin
(P3.5) on the original 8032. Compared to other
microcontrollers, the Zylogic ZE5 offers nearly un-
paralleled I/O capabilities.
Q
EN
D
Flip-Flop/
Latch
Input
Registered
Input
Clock
Clock
Enable
Input
Hysteresis
PAD
BusMinder™
Output
Enable
Drive
Strength
Output
Delay
Zero Hold
Time
D
EN
Q
D
EN
Q
Figure 27. Programmable Input/Output block (PIO).
CMOSTTL
V OH
V OL
0.8
2.4
3.8
5.0
2.0
V IL
V IH
0.4 0.4
2.4
V OH
V OL
0.8
1.0
TTL TTL
2.0
5.0
CMOS
V IL
V IH
3.5
CMOS
Triscend
E5 CSoC
+3.3V?.3V
+5V +5V
5-volt Device 5-volt Device
Figure 28. Zylogic ZE5 CSoC devices interface directly with nearly all 5-volt devices, even though
the ZE5 is powered from a 3.3 volt supply.