Specifications

Zylogic ZE5 Configurable System-on-Chip Platform
www.Zylogic.com.cn 26
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A CSL cell, as shown in Figure 26, consists of a
flip-flop plus combinatorial functions capable of
performing various logic, arithmetic, or memory
operations. Both these resources operate inde-
pendently or in tandem, depending on the specific
function implemented. An individual CSL cell is
capable of implementing the following types of
functions.
 Logic
 Arithmetic
 Memory
 Bus
 Sequential
Most logic functions are implemented using the
CSL cell's four-input look-up table (LUT4). Any
four-input, single-output function fits within a single
four-input LUT, regardless of it logical complexity.
A special mode allows two adjacent CSL to imple-
ment a five-input LUT (LUT5) and some logic func-
tions of up to nine inputs.
The shaded multiplexers in Figure 26 represent
data flow options, defined by the initialization data
loaded into the device at power-on or after assert-
ing the RST- pin.
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In logic mode, an individual CSL cell performs a
variety of combinatorial functions of the available
inputs, as shown in Table 9. A single CSL cell per-
forms any possible combinatorial function of four or
less inputs, regardless of complexity. Likewise,
two CSL cells working in tandem implement any
possible function of five inputs. Two CSL cells
also implement some functions of between six to
nine inputs, with limitations. A sequence of four- or
five-input functions, chained together, create wide
gate functions of practically any width. The per-
formance of various logic functions is shown in
Table 7
Table 7. Example logic functions and
their performance.
Function
CSL
Cells
Perform-
ance
Four-input XNOR 1 < 5 ns
Compare two 16-bit
values for equality
(X=Y)
8 < 20 ns
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In arithmetic mode, a CSL cell performs simple
arithmetic functions such as add, subtract, or mul-
tiply. Various functions, as shown in Table 10, pro-
vide common structures for building adders, sub-
tracters, comparators, accumulators, incrementers,
decrementers, binary counters, multipliers, and
other arithmetic-based operations. Table 8 shows
the performance of various arithmetic functions.
Table 8. Example arithmetic functions and
their performance.
Function
CSL
Cells
Perform-
ance
16-bit binary, loadable
up counter
16 > 40 MHz
16-bit ad-
der/subtracter (X-Y)
16 < 25 ns
16-bit comparator 16 < 25 ns
CARRY/
WIDE
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CO
ASYNC
LUT Flip-Flop
Programmed by
initialization data
Figure 26. A basic CSL cell of both combinatorial and sequential logic.