Specifications

Zylogic ZE5 Configurable System-on-Chip Platform
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In memory mode, a CSL cell implements an 8-bit, serial-in/serial-out, preloadable shift register with clock-
enable control and tap select control.
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SH
A2
A1
A0
SDI
DI
CK
SDO
EN
O
8-bit Shift
Register
Figure 79. 8-bit Shift Register.
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The values listed below are representative, guideline values extracted from measured internal test pat-
terns. Actual values may depend on application-specific use. FastChip reports specific, worst-case guar-
anteed values in the Timing Analysis section of the project report.
All timing parameters assume worst-case operating conditions, including process technology, power sup-
ply voltage, and junction temperature. Values include delay driving one interconnect segment.
Guideline Guideline
Speed Grade -25 -40
Description Symbol Fig. Device Min Max Min Max Units
Combinatorial Delays
Data valid on output O after address
change (no load operation, SH=High) [1]
T
AOSR
33 All 4.5 3.0 ns
Sequential Delays
CSL cell clock input CK to output O [1] T
COSR
33 All 7.0 5.3 ns
CSL cell clock input CK to serial data
output SDO [1,2]
T
CSDSR
33 All 6.4 5.9 ns
Setup Time before CSL Cell Clock CK
Data input DI T
DSSR
33 All 0.9 0.7 ns
Shift/load input SH T
SSSR
33 All 0.5 0.4 ns
Clock enable input CE T
CSSR
33 All 0.5 0.4 ns
Address inputs A2 - A0 T
ASSR
33 All 0.8 0.6 ns
Serial data input SDI T
ISSR
33 All 1.2 0.9 ns
Hold Time after CSL Cell Clock
All hold times T
HSR
33 All 0 0 ns
CSL Cell Clock
Clock High time T
CH
33 All 2.5 2.0 ns
Clock Low time T
CL
33 All 2.5 2.2 ns
Guideline Guideline
Note 1:
Includes output delay driving onto a single interconnect segment, T
ZIP
Note 2:
If SDO output drives SDI of adjacent block, subtract output delay, T
ZIP
, 1.4 ns for -25,
0.7 ns for -40
批注 [SKK26]: Setup is –
0.1 ns, hold is +0.6 ns, win-
dow is 0.7 ns, adjusted to
zero hold time
批注 [SKK27]: Setup time is
+0.1 ns, hold is +0.3 ns,
window is 0.4 ns, adjusted
to zero hold time
批注 [SKK28]: Hold time is
+0.4ns
批注 [SKK29]: Hold time is
–0.6 ns
批注 [SKK30]: Setup time is
0.8 ns, hold is 0.1ns, total
window is 0.9 ns.