Specifications
113 www.zylogic.com.cn
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In memory mode, two CSL cell in tandem implement a 16x1, edge-triggered, dual-port random-access
memory (RAM). The outputs can be captured in a flip-flop. Built-in circuitry flags an error when writing
both ports with different data, at the same address.
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CK
A3
A2
A1
A0
DA
WEA
WEB
B3
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B0
DB
ERRIN
OA
OB
ERROUT
16x1
dual-port RAM
Figure 78. 16x1 dual-port RAM.
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The values listed below are representative, guideline values extracted from measured internal test pat-
terns. Actual values may depend on application-specific use. FastChip reports specific, worst-case guar-
anteed values in the Timing Analysis section of the project report.
All timing values shown assume worst-case operating conditions, including process technology, power
supply voltage, and junction temperature. Values include delay driving one interconnect segment.
Guideline Guideline
Speed Grade -25 -40
Description Symbol Fig. Size Min Max Min Max
Units
Address write cycle time (clock pe-
riod)
T
WCDP
31,32 16x1 9.6 7.4 ns
CK clock pulse width (active edge) T
WPDP
31,32 16x1 8.1 6.2 ns
Address setup time before CK T
ASDP
31,32 16x1 0.8 0.6 ns
Address hold time after CK T
AHDP
31,32 16x1 0 0 ns
DA, DB setup time before CK T
DSDP
31,32 16x1 0.9 0.7 ns
DA, DB hold time after CK T
DHDP
31,32 16x1 0 0 ns
WEA, WEB setup time before CK T
WSDP
31,32 16x1 1.6 1.2 ns
WEA, WEB hold time after CK T
WHDP
31,32 16x1 0 0 ns
Data valid on OA, OB after CK [1] T
WODP
31,32 16x1 7.0 5.2 ns
Data valid after address change (no
Write Enable) [1]
T
AODP
31,32 16x1 5.5 3.0 ns
ERRIN to ERROUT valid [1,2] T
EIEO
31,32 16x1 5.1 3.5 ns
ERROUT valid after write data con-
flict after CK [1,2]
T
CKEO
31,32 16x1 8.9 5.8 ns
Guideline Guideline
Note 1:
Includes output delay driving onto a single interconnect segment, T
ZIP
Note 2:
If ERROUT output drives ERRIN of adjacent block, subtract output delay, T
ZIP
, 1.4 ns for -25,
0.7 ns for -40
批注 [SKK23]: Value in-
cludes 0.4 ns of hold time,
adjusted to show zero hold.
批注 [SKK24]: Setup time is
–0.1 ns, hold time is +0.6 ns.
Total window is 0.7 ns.
Adjusted to show zero hold.
批注 [SKK25]: Actual hold
time is –0.5 ns