Specifications

107 www.zylogic.com.cn
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The sideband signals are controls to and from the embedded 8032 "Turbo" microcontroller, unique to the
Zylogic ZE5 family. Each signal is associated with a specific dedicated resource inside the 8032 micro-
controller.
The values below indicate the number of Bus Clock cycles required for the signal to be recognized by the
microcontroller.
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XTAL
Timer 0
RXDOUT
TXD
RXDIN
INT1
INT0
HPINT
T0
T1
T2
T2EX
CPU ResetRSTC
Timer 1
Timer 2
Interrupt
Controller
UART
Reset
Crystal Osc.
Figure 65. Embedded 8032 "Turbo" microcontroller sideband signals.
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Final Final
Speed Grade -25 -40
Description Symbol Fig. Device Min Max Min Max
Units
Timer 0
T0 pulse width T
ST0P
19 All 5 5 T
BCYC
Timer 1
T1 pulse width T
ST1P
19 All 5 5 T
BCYC
Timer 2
T2 pulse width T
ST2P
19 All 5 5 T
BCYC
T2EX pulse width T
ST2XP
19 All 5 5 T
BCYC
Interrupts
HPINT pulse width T
SHPP
19 All 5 5 T
BCYC
INT0 pulse width T
SIT0P
19 All 5 5 T
BCYC
INT1 pulse width T
SIT1P
19 All 5 5 T
BCYC
Resets
Reset input to 8032, RSTC pulse
width
T
SRSTC
19 All 2 2 T
BCYC
Final Final