Specifications

Zylogic ZE5 Configurable System-on-Chip Platform
www.Zylogic.com.cn 10
DMA Transfer Count Channel 0 (CNT[15:8])
CNT15 CNT15 CNT13 CNT12 CNT11 CNT10 CNT9 CNT8
76543210
Mnemonic: DMASCNT0_1 Address: FF25h
DMA Transfer Count Channel 0 (CNT[23:16])
CNT23 CNT22 CNT21 CNT20 CNT19 CNT18 CNT17 CNT16
76543210
Mnemonic: DMASCNT0_2 Address: FF26h
Channel 1:
DMA Transfer Count Channel 1 (CNT[7:0])
CNT7 CNT6 CNT5 CNT4 CNT3 CNT2 CNT1 CNT0
76543210
Mnemonic: DMASCNT1_0 Address: FF38h
DMA Transfer Count Channel 1 (CNT[15:8])
CNT15 CNT15 CNT13 CNT12 CNT11 CNT10 CNT9 CNT8
76543210
Mnemonic: DMASCNT1_1 Address: FF39h
DMA Transfer Count Channel 1 (CNT[23:16])
CNT23 CNT22 CNT21 CNT20 CNT19 CNT18 CNT17 CNT16
76543210
Mnemonic: DMASCNT1_2 Address: FF40h
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This register and Current Count register are used
to monitor the current state of a particular DMA
channel or for debugging. This register contains
the output of the transfer address counter. This
register is loaded at the beginning of a transfer and
is incremented or decremented at every transfer,
controlled by the address mode bits ADRM1 and
ADRM0.
The values are read-only.
Channel 0:
DMA Current Address Channel 0 (A[7:0])
A7 A6 A5 A4 A3 A2 A1 A0
76543210
Mnemonic: DMACADR0_0 Address: FF2Bh
DMA Current Address Channel 0 (A[15:8])
A15 A14 A13 A12 A11 A10 A9 A8
76543210
Mnemonic: DMACADR0_1 Address: FF2Ch
DMA Current Address Channel 0 (A[23:16])
A23 A22A21A20A19A18A17A16
76543210
Mnemonic: DMACADR0_2 Address: FF2Dh
DMA Current Address Channel 0 (A[31:24])
A31 A30A29A28A27A26A25A24
76543210
Mnemonic: DMACADR0_3 Address: FF2Eh
Channel 1:
DMA Current Address Channel 1 (A[7:0])
A7 A6 A5 A4 A3 A2 A1 A0
76543210
Mnemonic: DMACADR1_0 Address: FF3Fh
DMA Current Address Channel 1 (A[15:8])
A15 A14 A13 A12 A11 A10 A9 A8
76543210
Mnemonic: DMACADR1_1 Address: FF40h
DMA Current Address Channel 1 (A[23:16])
A23 A22A21A20A19A18A17A16
76543210
Mnemonic: DMACADR1_2 Address: FF41h
DMA Current Address Channel 1 (A[31:24])
A31 A30A29A28A27A26A25A24
76543210
Mnemonic: DMACADR1_3 Address: FF42h
D
D
M
M
A
A
C
C
u
u
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r
r
r
e
e
n
n
t
t
C
C
o
o
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R
R
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g
g
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s
s
t
t
e
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r
r
(
(
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c
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h
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a
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This is the output of the transfer count counter. It
indicates how many bytes are left in the current
transfer.
The values are read-only.
Channel 0:
DMA Current Count Channel 0 (CNT[7:0])
CNT7 CNT6 CNT5 CNT4 CNT3 CNT2 CNT1 CNT0
76543210
Mnemonic: DMACCNT0_0 Address: FF2Fh
DMA Current Count Channel 0 (CNT[15:8])
CNT15 CNT15 CNT13 CNT12 CNT11 CNT10 CNT9 CNT8
76543210
Mnemonic: DMACCNT0_1 Address: FF30h
DMA Current Count Channel 0 (CNT[23:16])