Specifications
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• PROCEDURE
• Initial Conditions
R5 fully counterclockwise
R19 fully clockwise
R29 fully clockwise
C19 turned out so slug is flush with top of cylinder.
All stub zippers intact.
RF input connected to network analyzer reflection port.
Output terminated by direct connection of 50W 20 dB attenuator. Attenuator output connected to network analyzer
transmission port.
See Fig. 1
• DC Regulator
Apply 24VDC, current limited to 2A at DC input.
Verify current draw is less than 100 mA
Measure voltage at U3 pin 1. Verify this to be 8.0VDC +/- 0.25V
• Overcurrent Trip Point
Not adjusted in this procedure
• Preliminary Gate Bias
Adjust R5 clockwise until supply current is 1.4 A +/- 0.05A
• Temperature Shutdown Point
Not adjusted in this procedure
• Input Match
Observe input return loss on a logarithmic 5 dB/division scale. Note position of maximum return loss (dip in curve).
If dip is below desired midband frequency, then stub lengths at input locations A,B,C,D must be reduced to bring
match to higher frequencies. If dip is above desired band, then stub length must be increased. If insufficient stub
length is available, then additional copper tape can be added in increments similar to stub segment sizes on PCB.
Adjust C19 occasionally during tuning, at beginning and after any stub has been cut, to maximize return loss dip depth.
This adjustment may slightly impact dip frequency as well. Do not bottom out C19.
When tuning, remove one segment from stub A first, then C, Then B, and then D. If you still need to remove more,
then start again at A and follow the sequence repeatedly. Do not remove an additional stub segment from any of the
4 input stubs until all others already have an equal number removed.
If you have removed all input stub segments and appear close to moving dip to desired point, then cut off additional
copper from the input wide trace, maintaining a center conductor width close to the width between the cuttable stubs.
You are done when input return loss dip is centered at about midband, and return loss at band edges is about equal
and better than 10 dB.
Also verify that gain is flat within 1 dB over the band, and that gain peak is not outside the band. Optimal gain tuning
should correspond roughly with optimum return loss tuning. If this is not the case, then check for missing matching
components and improper soldering at power device.
• Output Match
Set up apparatus as in Fig. 2. At beginning of each test session, verify that intermod levels of combined generator
setup are less than –60 dBc at an output level of +17 dBm/carrier.
Set first generator to 500 kHz below midband frequency. Set second generator to 500 kHz above midband frequency.
Ensure generator levels are within 0.2 dB of each other at all times.
Energize UUT and adjust input signal level to achieve +30 dBm per carrier at UUT output.
Adjust C19 for lowest third order intermodulation to carrier ratio. Note that gain may vary a small amount with this
adjustment so do not look at intermod alone..
Adjust bias for lowest intermodulation to carrier ratio. If prior adjustments are nominal, you will notice a peak in
intermod rejection, at some bias current between 1.25 and 1.6A Do not try to adjust much higher than 1.6A.
Intermod should get worse both above and below this “sweet spot”. You may also find a null at lower currents, but
this is generally a false optimization point that will disappear with higher input levels.
While adjusting bias voltage, it may be better to observe output main carrier level alone on a fine dB scale. The best
optimization point generally yields peak gain. Higher bias currents may actually reduce gain as the device conduction
cycle passes 180 degrees.