Data Sheet

9
DRV8835
www.ti.com SLVSB18G –MARCH 2012–REVISED MAY 2016
Product Folder Links: DRV8835
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7.3 Feature Description
7.3.1 Protection Circuits
The DRV8835 is fully protected against undervoltage, overcurrent, and overtemperature events.
7.3.1.1 Overcurrent Protection (OCP)
An analog current limit circuit on each FET limits the current through the FET by removing the gate drive. If this
analog current limit persists for longer than the OCP time, all FETs in the H-bridge disable. After approximately
1 ms, the bridge re-enable automatically.
Overcurrent conditions on both high-side and low-side devices; a short to ground, supply, or across the motor
winding result in an overcurrent shutdown.
7.3.1.2 Thermal Shutdown (TSD)
If the die temperature exceeds safe limits, all FETs in the H-bridge disable. Operation automatically resumes
once the die temperature falls to a safe level.
7.3.1.3 Undervoltage Lockout (UVLO)
If at any time the voltage on the VCC pins falls below the undervoltage lockout threshold voltage, all circuitry in
the device disable, and internal logic resets. Operation resumes when VCC rises above the UVLO threshold.
Table 1. Device Protection
FAULT CONDITION ERROR REPORT H-BRIDGE INTERNAL
CIRCUITS
RECOVERY
VCC undervoltage
(UVLO)
VCC < VUVLO None Disabled Disabled VCC > VUVLO
Overcurrent (OCP) IOUT > IOCP None Disabled Operating tOCR
Thermal Shutdown
(TSD)
TJ > TTSD None Disabled Operating TJ < TTSD – THYS
7.4 Device Functional Modes
The DRV8835 is active when the VCC is set to a logic high. When in sleep mode, the H-bridge FETs are
disabled (HIGH-Z).
Table 2. Device Operating Modes
OPERATING MODE CONDITION H-BRIDGE INTERNAL CIRCUITS
Operating nSLEEP high Operating Operating
Sleep mode nSLEEP low Disabled Disabled
Fault encountered Any fault condition met Disabled See Table 1