Data Sheet

AMIS−30543
http://onsemi.com
37
Table 15. SPI STATUS FLAGS OVERVIEW
Mnemonic Flag
Length
(bit)
Related
SPI Register
Comment
Reset
State
CPFail Charge pump failure 1 Status Register 0 ‘0’ = no failure
‘1’ = failure: indicates that the charge pump does
not reach the required voltage level. Note 1
‘0’
MSP[8:0] Micro−step position 9 Status Register 3 and
Status Register 4
Translator micro step position ‘000000000’
OPENX OPEN Coil X 1 Status Register 0 ‘1’ = Open coil detected ‘0’
OPENY OPEN Coil Y 1 Status Register 0 ‘1’ = Open coil detected ‘0’
OVCXNB OVer Current on X
H−bridge; MOTXN
terminal; Bottom
tran.
1 Status Register 1 ‘0’ = no failure
‘1’ = failure: indicates that over current is detected
at bottom transistor XN−terminal
‘0’
OVCXNT OVer Current on X
H−bridge; MOTXN
terminal; Top transist.
1 Status Register 1 ‘0’ = no failure
‘1’ = failure: indicates that over current is detected
at top transistor XN−terminal
‘0’
OVCXPB OVer Current on X
H−bridge; MOTXP
terminal; Bottom
tran.
1 Status Register 1 ‘0’ = no failure
‘1’ = failure: indicates that over current is detected
at bottom transistor XP−terminal
‘0’
OVCXPT OVer Current on X
H−bridge; MOTXP
terminal; Top transist.
1 Status Register 1 ‘0’ = no failure
‘1’ = failure: indicates that over current is detected
at top transistor XP−terminal
‘0’
OVCYNB OVer Current on Y
H−bridge; MOTYN
terminal; Bottom
tran.
1 Status Register 2 ‘0’ = no failure
‘1’ = failure: indicates that over current is detected
at bottom transistor YN−terminal
‘0’
OVCYNT OVer Current on Y
H−bridge; MOTYN
terminal; Top transist.
1 Status Register 2 ‘0’ = no failure
‘1’ = failure: indicates that over current is detected
at top transistor YN−terminal
‘0’
OVCYPB OVer Current on Y
H−bridge; MOTYP
terminal; Bottom
tran.
1 Status Register 2 ‘0’ = no failure
‘1’ = failure: indicates that over current is detected
at bottom transistor YP−terminal
‘0’
OVCYPT OVer Current on Y
H−bridge; MOTYP
terminal; Top transist.
1 Status Register 2 ‘0’ = no failure
‘1’ = failure: indicates that over current is detected
at top transistor YP−terminal
‘0’
TSD Thermal shutdown 1 Status Register 2 ‘0’
TW Thermal warning 1 Status Register 0 ‘0’
WD Watchdog event 1 Status Register 0 ‘1’ = watchdog reset after time−out ‘0’
NOTE: WD − This bit indicates that the watchdog timer has not been cleared properly. If the master reads that WD is set to “1” after reset,
it means that a watchdog reset occurred (warm boot) instead of POR (cold boot). WD bit will be cleared only when the master
writes “0” to WDEN bit.
Table 16. ORDERING INFORMATION
Part No. Peak Current
Temperature
Range
Package Shipping
†
AMIS30543C5431G 3000 mA
−40°C to 125°C
NQFP−32 (7 x 7 mm)
(Pb−Free)
Units / Tubes
AMIS30543C5431RG 3000 mA
−40°C to 125°C
NQFP−32 (7 x 7 mm)
(Pb−Free)
Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.