Data Sheet

AMIS−30543
http://onsemi.com
12
Automatic Duty Cycle Adaptation
In case the supply voltage is lower than 2*Bemf, then the
duty cycle of the PWM is adapted automatically to > 50% to
maintain the requested average current in the coils. This
process is completely automatic and requires no additional
parameters for operation. The over−all current−ripple is
divided by two if PWM frequency is doubled (see Table 12
SPI Control Parameter Overview PWMF)
Actual value
Duty Cycle
<50%
Duty Cycle > 50%
Duty Cycle < 50%
t
Icoil
Set value
T
PWM
Figure 9. Automatic Duty Cycle Adaption
Step Translator and Step Mode
The step translator provides the control of the motor by
means of SM[2:0], ESM[2:0], SPI register DIRCTRL and
input pins DIR and NXT. It is translating consecutive steps
in corresponding currents in both motor coils for a given step
mode.
One out of eleven possible stepping modes can be selected
through SPI−bits SM[2:0] and ESM[2:0] (see Table 12 SPI
Control Parameter Overview). After power−on or hard
reset, the coil−current translator is set to the default 1/32
micro−stepping at position ‘0’. When remaining in the same
step mode, subsequent translator positions are all in the same
column and increased or decreased with 1. Table 9 lists the
output current vs. the translator position.
As shown in Figure 10 the output current−pairs can be
projected approximately on a circle in the (I
x
, I
y
) plane.
There are, however, two exceptions: uncompensated half
step and uncompensated full step. In these step modes the
currents are not regulated to a fraction of I
max
but are in all
intermediate steps regulated at 100%. In the (I
x
, I
y
) plane the
current−pairs are projected on a square. Table 8 lists the
output current vs. the translator position for these cases.
Table 8. SQUARE TRANSLATOR TABLE FOR UNCOMPENSATED FULL STEP AND UNCOMPENSATED HALF
STEP
MSP[8:0]
Stepmode ( SM[2:0] ) % of I
max
101 110
Coil x Coil y
Uncompensated Half Step Uncompensated Full Step
0 0000 0000 0 − 0 100
0 0100 0000 1 1 100 100
0 1000 0000 2 − 100 0
0 1100 0000 3 2 100 −100
1 0000 0000 4 − 0 −100
1 0100 0000 5 3 −100 −100
1 1000 0000 6 − −100 0
1 1100 0000 7 0 −100 100