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DRV8711

STEP

SLEEPn

SPI

8.0 V to 52 V

MCU

+ -

1/256

µstep

Stepper

Motor

Pre-Driver

DIR

nFAULT

+ -

N-Channel

MOSFETs

Sense

Gate Drive

Product

Folder

Order

Now

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Documents

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Software

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Design

An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,

intellectual property matters and other important disclaimers. PRODUCTION DATA.

DRV8711

SLVSC40G –JUNE 2013–REVISED MAY 2017

DRV8711 Stepper Motor Controller IC

1 Features

• Pulse Width Modulation (PWM) Microstepping

Motor Driver

– Built-In 1/256-Step Microstepping Indexer

– Drives External N-Channel MOSFETs

– Optional STEP/DIR Pins

– Optional PWM Control Interface for DC Motors

• Flexible Decay Modes, Including Automatic Mixed

Decay Mode

• Stall Detection With Optional BEMF Output

• Highly Configurable SPI Serial Interface

• Internal Reference and Torque DAC

• 8-V to 52-V Operating Supply Voltage Range

• Scalable Output Current

• Thermally Enhanced Surface-Mount Package

• 5-V Regulator Capable of 10-mA Load

• Protection and Diagnostic Features

– Overcurrent Protection (OCP)

– Overtemperature Shutdown (OTS)

– Undervoltage Lockout (UVLO)

– Individual Fault Condition Indication Bits

– Fault Condition Indication Pin

2 Applications

• Office Automation Machines

• Factory Automation

• Textile Machines

• Robotics

3 Description

The DRV8711 device is a stepper motor controller

that uses external N-channel MOSFETs to drive a

bipolar stepper motor or two brushed DC motors. A

microstepping indexer is integrated, which is capable

of step modes from full step to 1/256-step.

An ultra-smooth motion profile can be achieved using

adaptive blanking time and various current decay

modes, including an auto-mixed decay mode. Motor

stall is reported with an optional back-EMF output.

A simple step/direction or PWM interface allows easy

interfacing to controller circuits. A SPI serial interface

is used to program the device operation. Output

current (torque), step mode, decay mode, and stall

detection functions are all programmable through a

SPI serial interface.

Internal shutdown functions are provided for

overcurrent protection, short-circuit protection,

undervoltage lockout, and overtemperature. Fault

conditions are indicated through a FAULTn pin, and

each fault condition is reported through a dedicated

bit through SPI.

The DRV8711 is packaged in a PowerPAD™ 38-pin

HTSSOP package with thermal pad (Eco-friendly:

RoHS and no Sb/Br).

Device Information

(1)

PART NUMBER PACKAGE BODY SIZE (NOM)

DRV8711 HTSSOP (38) 9.70 mm × 4.40 mm

(1) For all available packages, see the orderable addendum at

the end of the data sheet.

Simplified Schematic

Summary of content (46 pages)

PAGE 1
Product Folder Order Now Support & Community Tools & Software Technical Documents Reference Design DRV8711 SLVSC40G – JUNE 2013 – REVISED MAY 2017 DRV8711 Stepper Motor Controller IC 1 Features 3 Description • The DRV8711 device is a stepper motor controller that uses external N-channel MOSFETs to drive a bipolar stepper motor or two brushed DC motors. A microstepping indexer is integrated, which is capable of step modes from full step to 1/256-step.
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DRV8711 SLVSC40G – JUNE 2013 – REVISED MAY 2017 www.ti.com Table of Contents 1 2 3 4 5 6 7 Features .................................................................. Applications ........................................................... Description ............................................................. Revision History..................................................... Pin Configuration and Functions ......................... Specifications....................................................
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DRV8711 www.ti.
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DRV8711 SLVSC40G – JUNE 2013 – REVISED MAY 2017 www.ti.com Pin Functions (continued) PIN NAME NO. I/O (1) SDATI 15 I SDATO 17 STALLn/ BEMFVn DESCRIPTION EXTERNAL COMPONENTS OR CONNECTIONS Serial data input Serial data input from controller. Internal pulldown. OD Serial data output Serial data output to controller. Open-drain output requires external pullup. 19 OD Stall/Back EMF valid Internal stall detect mode: logic low when motor stall detected.
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DRV8711 www.ti.com SLVSC40G – JUNE 2013 – REVISED MAY 2017 6 Specifications 6.1 Absolute Maximum Ratings over operating free-air temperature range (unless otherwise noted) (1) (2) (3) MIN MAX UNIT Power supply voltage –0.6 60 V Charge pump voltage (CP2, VCP) –0.6 VM + 12 V Charge pump voltage (CP1) –0.6 VM + 0.6 V 5-V regulator voltage (V5) –0.6 5.5 V Internal regulator voltage (VINT) –0.
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DRV8711 SLVSC40G – JUNE 2013 – REVISED MAY 2017 www.ti.com 6.5 Electrical Characteristics over operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT POWER SUPPLIES IVM VM operating supply current VM = 24 V 17 20 mA IVMQ VM sleep mode supply current VM = 24 V, SLEEPn = 0, TA = 25°C 65 98 μA VM rising 7.1 8 VM falling 6.
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DRV8711 SLVSC40G – JUNE 2013 – REVISED MAY 2017 www.ti.com 6.7 Indexer Timing Requirements over operating free-air temperature range (unless otherwise noted) (see Figure 2) NO. MIN NOM MAX UNIT 1 fSTEP Step frequency 2 tWH(STEP) Pulse duration, STEP high 1.9 250 3 tWL(STEP) Pulse duration, STEP low 1.
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DRV8711 www.ti.com SLVSC40G – JUNE 2013 – REVISED MAY 2017 6.8 Typical Characteristics 17.5 240 ±40ƒC 25°C 85°C 200 17.0 IVMQ (µA) IVM (mA) 160 16.5 16.0 120 80 ±40ƒC 15.5 40 25°C 85°C 15.0 8 12 16 20 24 28 32 36 40 44 48 VVM (V) 0 52 8 12 16 24 28 32 36 40 44 48 VVM (V) Figure 3. Operating Current 52 C006 Figure 4. Sleep Current 12 5.5 11 5.4 5.3 10 5.2 9 V5 No Load RDS(ON) HS + LS) (mŸ) 20 C005 8 7 5.1 5.0 4.9 4.8 6 ±40ƒC 4.
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DRV8711 SLVSC40G – JUNE 2013 – REVISED MAY 2017 www.ti.com 7 Detailed Description 7.1 Overview The DRV8711 device is a stepper motor controller that uses external N-channel MOSFETs to drive a bipolar stepper motor or two brushed DC motors. A microstepping indexer is integrated, which is capable of step modes from full step to 1/256-step. An ultra-smooth motion profile can be achieved using adaptive blanking time, adjustable decay times, and various current decay modes, including an auto-mixed decay mode.
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DRV8711 www.ti.com SLVSC40G – JUNE 2013 – REVISED MAY 2017 7.2 Functional Block Diagram VM 0.1µF + 1µF 0.01µF 100µF CP2 CP1 VM VCP VM 5V OUT VM Charge Pump V5 Gate Drive & OCP Regs VINT A1LS PWM logic 1µ F RESET UVLO PUC VM DCM Step Motor AOUT2 A2LS + Comp + - DIR/AIN2 AISENP ISEN amp - STEP/AIN1 A2HS Gate Drive & OCP OverTemp SLEEPn VM AOUT1 + 0.
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DRV8711 SLVSC40G – JUNE 2013 – REVISED MAY 2017 www.ti.com 7.3 Feature Description Table 1 lists the critical components for the device. Table 1. Critical Components PIN NAME 4 VM COMPONENT 100-µF electrolytic rated for VM voltage to GND 0.01-µF ceramic rated for VM voltage to GND 3 VCP 1-µF ceramic X7R rated 16 V to VCP 1, 2 CP1, CP2 6 V5 7 VINT 1-µF ceramic X7R rated 6.
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DRV8711 www.ti.com SLVSC40G – JUNE 2013 – REVISED MAY 2017 x1HS Gate Drive & OCP xIN1 VM xOUT1 x1LS xIN2 PWM logic x2HS Gate Drive & OCP VM xOUT2 x2LS + RISENSE Comp xISENP + ISEN amp xISENN - + - + Comp VREF X ISGAIN 1V TORQUE Torque DAC Figure 7. Direct PWM Input Mode The current through the motor windings is regulated by an adjustable fixed-off-time PWM current regulation circuit.
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DRV8711 SLVSC40G – JUNE 2013 – REVISED MAY 2017 www.ti.com 7.3.3 Microstepping Indexer Built-in indexer logic in the DRV8711 allows a number of different stepping configurations. The MODE bits in the CTRL register are used to configure the stepping format as shown in Table 3. Table 3.
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DRV8711 www.ti.com SLVSC40G – JUNE 2013 – REVISED MAY 2017 Table 4 shows the relative current and step directions for full-step through 1/8-step operation. Higher microstepping resolutions follow the same pattern. The AOUT current is the sine of the electrical angle; BOUT current is the cosine of the electrical angle. The reset state is 45°. This state is entered at power up or application of RESETn. This is shown in Table 4 by cells shaded in yellow. Table 4.
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DRV8711 SLVSC40G – JUNE 2013 – REVISED MAY 2017 www.ti.com 7.3.4 Current Regulation The current through the motor windings is regulated by an adjustable fixed-off-time PWM current regulation circuit. When an H-bridge is enabled, current rises through the winding at a rate dependent on the DC voltage and inductance of the winding and the magnitude of the back EMF present.
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DRV8711 www.ti.com IFS = SLVSC40G – JUNE 2013 – REVISED MAY 2017 2.75V · TORQUE 256 · ISGAIN · RISENSE where • • TORQUE is the setting of the TORQUE bits ISGAIN is the programmed gain of the ISENSE amplifiers (5, 10, 20, or 40) (2) Example: If a 0.1-Ω sense resistor is used, ISGAIN is set to 0 (gain of 5), and TORQUE is set to 255, the full-scale (100%) chopping current will be (2.75 V * 255) / (256 * 5 * 0.1 Ω) = 5.5 A. 7.3.
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DRV8711 SLVSC40G – JUNE 2013 – REVISED MAY 2017 www.ti.com Auto-mixed decay mode samples the current level at the end of the blanking time, and if the current is above the Itrip threshold, immediately changes the H-bridge to fast decay. During fast decay, the (negative) current is monitored, and when it falls below the Itrip threshold (and another blanking time has passed), the bridge is switched to slow decay. Once the fixed off time expires, a new cycle is started.
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DRV8711 www.ti.com SLVSC40G – JUNE 2013 – REVISED MAY 2017 Itrip decrease tON tBLANK tON tBLANK tOFF tOFF Itrip Decrease in Itrip terminates cycle, fast decay begins Itrip increase tON tBLANK When I< Itrip in fast decay change to slow decay tON On tOFF tBLANK Fast Decay Slow Decay Itrip Increase in Itrip terminates cycle, bridge turns on Figure 11.
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DRV8711 SLVSC40G – JUNE 2013 – REVISED MAY 2017 www.ti.com The same blanking time is applied to the fast decay period in auto decay mode. The PWM will ignore any transitions on Itrip after entering fast decay mode, until the blanking time has expired. To provide better current control at very low current steps, an adaptive blanking time mode can be enabled by setting the ABT bit in the BLANK register.
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DRV8711 www.ti.
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DRV8711 SLVSC40G – JUNE 2013 – REVISED MAY 2017 www.ti.com In a system with capacitor charge Q and desired rise time RT, IDRIVE and TDRIVE can be initially selected based on: IDRIVE > Q / RT TDRIVE > 2 × RT For best results, select the smallest IDRIVE and TDRIVE that meet the above conditions. Example: If the gate charge is 15 nC and the desired rise time is 400 ns, then select: IDRIVEP = 50 mA, IDRIVEN = 100 mA TDRIVEP = TDRIVEN = 1 µs 7.3.
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DRV8711 www.ti.com SLVSC40G – JUNE 2013 – REVISED MAY 2017 VM V5 AOUT1 BEMF buffer 2 VDIV VM Step Motor AOUT2 2 control logic To STATUS register STALLn/ BEMFVn VDIV VM SDCNT 2 BOUT1 + counter comp 2 reference 1.80 V VM VDIV BOUT2 8 SDTHR DAC SDTHR DAC 2 VDIV Figure 15. Stall Detection 7.3.10.1 Internal Stall Detection To use internal stall detection, the EXSTALL bit in the CTRL register is set to 0.
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DRV8711 SLVSC40G – JUNE 2013 – REVISED MAY 2017 www.ti.com 7.3.10.2 External Stall Detection To use an external microcontroller to manage stall detection, the EXSTALL bit in the CTRL register is set to 1. In this mode, the STALLn / BEMFVn output pin is used to signal a valid back EMF measurement is ready. In addition, the SDT and SDTLAT bits are also set at this time. BEMFVn and BEMF are still valid outputs in this mode even if the step time is smaller than SMPLTH time.
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DRV8711 www.ti.com SLVSC40G – JUNE 2013 – REVISED MAY 2017 7.4 Device Functional Modes 7.4.1 RESET and SLEEPn Operation An internal power-up reset circuit monitors the voltage applied to the VM pin. If VM falls below the VM undervoltage lockout voltage, the part is reset, as described below for the case of asserting the RESET pin. If the RESET pin is asserted, all internal logic including the indexer is reset. All registers are returned to their initial default conditions.
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DRV8711 SLVSC40G – JUNE 2013 – REVISED MAY 2017 www.ti.com Programming (continued) SCS SCLK 1 SDATI 2 WRT A. 3 A2 4 A1 A0 5 6 D11 D10 7 Note 1 8 D9 D8 X 9 10 11 12 13 14 15 16 D7 D6 D5 D4 D3 D2 D1 D0 Any amount of time may pass between bits, as long as SCS stays active high. This allows two 8-bit writes to be used. Figure 17. Write Operation Data may be read from the registers through the SDATO pin.
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DRV8711 www.ti.com SLVSC40G – JUNE 2013 – REVISED MAY 2017 Register Maps (continued) 7.6.
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DRV8711 SLVSC40G – JUNE 2013 – REVISED MAY 2017 www.ti.com 7.6.5 BLANK Register (Address = 0x03) BIT NAME SIZE R/W DEFAULT DESCRIPTION Sets current trip blanking time, in increments of 20 ns 0x00: 1 µs … 0x32: 1 µs 0x33: 1.02 µs … 0xFE: 5.10 µs 0xFF: 5.12 µs Also sets minimum on-time of PWM 7-0 TBLANK 8 R/W 0x80 8 ABT 1 R/W 0 0: Disable adaptive blanking time 1: Enable adaptive blanking time 11-9 Reserved 3 - - Reserved 7.6.
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DRV8711 www.ti.
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DRV8711 SLVSC40G – JUNE 2013 – REVISED MAY 2017 www.ti.com 8 Application and Implementation NOTE Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality. 8.
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DRV8711 www.ti.com SLVSC40G – JUNE 2013 – REVISED MAY 2017 Typical Application (continued) TYPICAL APPLICATION DRV8711 CP1 GND CP2 AOUT1 VCP A1HS VM A1LS 0.1 uF VM + 100 uF 1 uF 0.01 uF (1) GND AISENP V5 AISENN VM 0.
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DRV8711 SLVSC40G – JUNE 2013 – REVISED MAY 2017 www.ti.com 8.2.2 Detailed Design Procedure 8.2.2.1 Stepper Motor Speed The first step in configuring the DRV8711 requires the desired motor speed and microstepping level. If the target application requires a constant speed, then a square wave with frequency ƒstep must be applied to the STEP pin. If the target motor start-up speed is too high, the motor will not spin.
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DRV8711 www.ti.com SLVSC40G – JUNE 2013 – REVISED MAY 2017 8.2.3 Application Curves Figure 21. 1/32 Microstepping Drive Current Figure 22.
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DRV8711 SLVSC40G – JUNE 2013 – REVISED MAY 2017 www.ti.com 9 Power Supply Recommendations 9.1 Bulk Capacitance Having an appropriate local bulk capacitance is an important factor in motor drive system design. It is generally beneficial to have more bulk capacitance, while the disadvantages are increased cost and physical size.
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DRV8711 www.ti.com SLVSC40G – JUNE 2013 – REVISED MAY 2017 10 Layout 10.1 Layout Guidelines The VM pin should be bypassed to GND using low-ESR ceramic bypass capacitors with a recommended value of 0.01-μF rated for VM. This capacitor should be placed as close to the VM pin as possible with a thick trace or ground plane connection to the device GND pin. The VM pin must be bypassed to ground using an appropriate bulk capacitor.
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DRV8711 SLVSC40G – JUNE 2013 – REVISED MAY 2017 www.ti.com 10.2 Layout Example CP1 GND CP2 AOUT1 VCP A 1HS VM A1LS GND AISENP V5 AISENN VINT A2LS SLEEPn A 2HS RESET AOUT2 0. 1 µF 0. 01 µF + 1 µF 1 µF 0. 1 µF STEP / AIN1 GND DIR / AIN2 BOUT1 BIN1 B 1HS BIN2 B1LS SCLK BISENP SDATI BISENN SCS B2 LS SDATO B2HS FAULTn BOUT2 STALLn / BEMFVn BEMF Logic High 3. 3 kŸ Optional 3. 3 kŸ 1 µF Figure 24.
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DRV8711 www.ti.com SLVSC40G – JUNE 2013 – REVISED MAY 2017 11 Device and Documentation Support 11.1 Documentation Support 11.1.1 Related Documentation For related documentation see the following: • DRV8711 Decay Mode Setting Optimization • DRV8711 Quick Spin and Tuning Guide • PowerPAD™ Thermally Enhanced Package • PowerPAD™ Made Easy 11.2 Receiving Notification of Documentation Updates To receive notification of documentation updates, navigate to the device product folder on ti.com.
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE MATERIALS INFORMATION www.ti.com 26-Feb-2019 TAPE AND REEL INFORMATION *All dimensions are nominal Device DRV8711DCPR Package Package Pins Type Drawing SPQ HTSSOP 2000 DCP 38 Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) 330.0 16.4 Pack Materials-Page 1 6.9 B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant 10.2 1.8 12.0 16.
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PACKAGE MATERIALS INFORMATION www.ti.com 26-Feb-2019 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) DRV8711DCPR HTSSOP DCP 38 2000 350.0 350.0 43.
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GENERIC PACKAGE VIEW DCP 38 PowerPAD TSSOP - 1.2 mm max height SMALL OUTLINE PACKAGE 4.4 x 9.7, 0.22 mm pitch Images above are just a representation of the package family, actual package may vary. Refer to the product data sheet for package details. 4224560/A www.ti.
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PACKAGE OUTLINE DCP0038A TM PowerPAD TSSOP - 1.2 mm max height SCALE 2.000 SMALL OUTLINE PACKAGE C 6.6 TYP 6.2 A 0.1 C PIN 1 INDEX AREA SEATING PLANE 36X 0.5 38 1 2X 9.8 9.6 NOTE 3 9 19 20 38X 4.5 4.3 B 0.27 0.17 0.08 C A B SEE DETAIL A (0.15) TYP 2X 0.95 MAX NOTE 5 19 20 2X 0.95 MAX NOTE 5 0.25 GAGE PLANE 1.2 MAX 39 4.70 3.94 THERMAL PAD 0 -8 0.15 0.05 0.75 0.50 DETAIL A A 20 TYPICAL 1 38 2.90 2.43 4218816/A 10/2018 PowerPAD is a trademark of Texas Instruments. NOTES: 1.
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EXAMPLE BOARD LAYOUT DCP0038A TM PowerPAD TSSOP - 1.2 mm max height SMALL OUTLINE PACKAGE (3.4) NOTE 9 METAL COVERED BY SOLDER MASK (2.9) 38X (1.5) 38X (0.3) SYMM SEE DETAILS 1 38 (R0.05) TYP 36X (0.5) 3X (1.2) SYMM 39 (4.7) (0.6) TYP (9.7) NOTE 9 SOLDER MASK DEFINED PAD ( 0.2) TYP VIA 20 19 (1.2) (5.8) LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE: 8X SOLDER MASK OPENING METAL UNDER SOLDER MASK METAL SOLDER MASK OPENING EXPOSED METAL EXPOSED METAL 0.05 MAX ALL AROUND 0.
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EXAMPLE STENCIL DESIGN DCP0038A TM PowerPAD TSSOP - 1.2 mm max height SMALL OUTLINE PACKAGE (2.9) BASED ON 0.125 THICK STENCIL 38X (1.5) 38X (0.3) METAL COVERED BY SOLDER MASK 1 38 (R0.05) TYP 36X (0.5) SYMM (4.7) BASED ON 0.125 THICK STENCIL 39 19 20 SYMM (5.8) SEE TABLE FOR DIFFERENT OPENINGS FOR OTHER STENCIL THICKNESSES SOLDER PASTE EXAMPLE BASED ON 0.125 mm THICK STENCIL SCALE: 8X STENCIL THICKNESS SOLDER STENCIL OPENING 0.1 0.125 0.15 0.175 3.24 X 5.25 2.90 X 4.70 (SHOWN) 2.65 X 4.
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