Data Sheet

ISL85410
5
FN8375.5
July 24, 2014
Submit Document Feedback
Functional Block Diagram
GATE
DRIVE
AND
DEADTIME
BIAS
LDO
OSCILLATOR
PFM
CURRENT
SET
FAULT
LOGIC
450mV/T SLOPE
COMPENSATION
(PWM ONLY)
500mV/A
CURRENT SENSE
PWM/PFM
SELECT LOGIC
EN/SOFT-
START
ZERO CURRENT
DETECTION
PWM
PWM
600mV VREF
g
m
150k
54pF
INTERNAL
COMPENSATION
s
R
Q
Q
POWER-
GOOD
LOGIC
FB
INTERNAl = 50µA/V
EXTERNAL = 230µA/V
5M
5M
PGND
PHASE
BOOT
VCC
VIN
EN
FB
FS
SYNC
COMP
PG
GND
PACKAGE
PADDLE
SS
FB
Ordering Information
PART NUMBER
(Notes 1, 2, 3)
PART
MARKING
TEMP. RANGE
(°C)
PACKAGE
(Pb-Free)
PKG.
DWG. #
ISL85410FRZ 5410 -40 to +125 12 Ld DFN L12.3x4
ISL85410EVAL1Z Evaluation Board
NOTES:
1. Add “T” suffix for Tape and Reel. Please refer to TB347
for details on reel specifications.
2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte
tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil
Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
3. For Moisture Sensitivity Level (MSL), please see device information page for ISL85410
. For more information on MSL please see techbrief TB363.