MC33926 Datasheet
Table Of Contents
- 5.0 A Throttle Control H-Bridge
- Figure 1. 33926 Simplified Application Diagram
- Internal Block Diagram
- Pin Connections
- Electrical Characteristics
- Table 2. Maximum Ratings
- Table 3. Static Electrical Characteristics
- Table 4. Dynamic Electrical Characteristics
- Figure 4. Output Delay Time
- Figure 5. Disable Delay Time
- Figure 6. Output Switching Time
- Figure 7. Current Limit Blanking Time and Constant-OFF Time
- Figure 8. Short-circuit Detection Turn-OFF Time tFAULT
- Figure 9. Output Current Limiting Foldback Region
- Functional Description
- Functional Internal Block Description
- Functional Device operation
- Typical applications
- Packaging
- Additional Documentation
- Table 6. Thermal Performance Comparison
- Figure 15. Surface Mount for Power PQFN with Exposed Pads
- Figure 16. Thermal Test Board
- Table 7. Thermal Resistance Performance
- Figure 17. Device on Thermal Test Board RqJA
- Figure 18. Transient Thermal Resistance RqJA, 1.0 W Step response, Device on Thermal Test Board Area A = 600 (mm2)
- Revision History
Analog Integrated Circuit Device Data
18 Freescale Semiconductor
33926
TYPICAL APPLICATIONS
INTRODUCTION
TYPICAL APPLICATIONS
INTRODUCTION
A typical application schematic is shown in Figure 14. For
precision high current applications in harsh, noisy
environments, the V
PWR
by-pass capacitor may need to be
substantially larger.
Figure 14. 33926 Typical Application Schematic
V
DD
LOGIC SUPPLY
CHARGE
PUMP
GATE DRIVE
AND
PROTECTION
LOGIC
CURRENT MIRRORS
AND
CONSTANT OFF-TIME
PWM CURRENT REGULATOR
VCP
CCP
OUT1
OUT2
AGND
TO GATES
HS1
LS1
HS2
LS2
VPWR
VSENSE
ILIM PWM
HS1 HS2
LS1 LS2LS2
EN
IN1
IN2
D2
D1
INV
SLEW
SF
FB
PGND
+5.0 V
R
FB
270 Ω
STATUS
FLAG
TO
ADC
1.0 μF
33 nF
V
PWR
100 nF
100
μF
M
PGND
LOW ESR