VNH5019A-E datasheet
Table Of Contents
- 1 Block diagram and pin description
- 2 Electrical specifications
- Figure 3. Current and voltage conventions
- 2.1 Absolute maximum ratings
- 2.2 Thermal data
- 2.3 Electrical characteristics
- 2.4 Waveforms and truth table
- Table 11. Truth table in normal operating conditions
- Figure 4. Typical application circuit for DC to 20 kHz PWM operation with reverse battery protection (option A)
- Figure 5. Typical application circuit for DC to 20 kHz PWM operation with reverse battery protection (option B)
- Table 12. Truth table in fault conditions (detected on OUTA)
- Figure 6. Behavior in fault condition (how a fault can be cleared)
- Table 13. Electrical transient requirements (part 1)
- Table 14. Electrical transient requirements (part 2)
- Table 15. Electrical transient requirements (part 3)
- 2.5 Reverse battery protection
- Figure 7. Definition of the delay times measurement
- Figure 8. Definition of the low-side switching times
- Figure 9. Definition of the high-side switching times
- Figure 10. Definition of dynamic cross conduction current during a PWM operation
- Figure 11. Waveforms in full bridge operation (part 1)
- Figure 12. Waveforms in full bridge operation (part 2)
- Figure 13. Definition of delay response time of sense current
- Figure 14. Half-bridge configuration
- Figure 15. Multi-motors configuration
- 3 Package and PCB thermal data
- 3.1 MultiPowerSO-30 thermal data
- 4 Package and packing information
- 5 Order codes
- 6 Revision history
Block diagram and pin description VNH5019A-E
6/34 Doc ID 15701 Rev 7
Figure 2. Configuration diagram (top view)
Table 1. Pin definitions and functions
Pin Symbol Function
1, 25, 30
OUT
A,
Heat Slug2
Source of high-side switch A / drain of low-side switch A, power
connection to the motor
2,14,17, 22,
24,29
N.C. Not connected
3, 13, 23
V
CC
,
Heat Slug1
Drain of high-side switches and connection to the drain of the
external PowerMOS used for the reverse battery protection
12 V
BAT
Battery connection and connection to the source of the external
PowerMOS used for the reverse battery protection
5EN
A
/DIAG
A
Status of high-side and low-side switches A; open drain output.
This pin must be connected to an external pull-up resistor. When
externally pulled low, it disables half-bridge A. In case of fault
detection (thermal shutdown of a high-side FET or excessive
ON-state voltage drop across a low-side FET), this pin is pulled
low by the device (see Table 12: Truth table in fault conditions
(detected on OUTA))
6CS_DIS
Active high CMOS compatible pin to disable the current sense
pin
4IN
A
Clockwise input. CMOS compatible
7 PWM PWM input. CMOS compatible.
8CS
Output of current sense. This output delivers a current
proportional to the motor current, if CS_DIS is low or left open.
The information can be read back as an analog voltage across
an external resistor.
OUT
A
OUT
A
OUT
A
OUT
B
OUT
B
N.C.
V
CC
IN
A
EN
A
/DIAG
A
CS_DIS
PWM
CS
EN
B
/DIAG
B
IN
B
CP
V
BAT
V
CC
OUT
B
N.C.
N.C.
GND
A
GND
A
GND
A
N.C.
V
CC
N.C.
GND
B
GND
B
GND
B
1
15 16
30
V
CC
Heat Slug1
OUT
B
Heat Slug3
OUT
A
Heat Slug2
N.C.










