VNH5019A-E datasheet
Table Of Contents
- 1 Block diagram and pin description
- 2 Electrical specifications
- Figure 3. Current and voltage conventions
- 2.1 Absolute maximum ratings
- 2.2 Thermal data
- 2.3 Electrical characteristics
- 2.4 Waveforms and truth table
- Table 11. Truth table in normal operating conditions
- Figure 4. Typical application circuit for DC to 20 kHz PWM operation with reverse battery protection (option A)
- Figure 5. Typical application circuit for DC to 20 kHz PWM operation with reverse battery protection (option B)
- Table 12. Truth table in fault conditions (detected on OUTA)
- Figure 6. Behavior in fault condition (how a fault can be cleared)
- Table 13. Electrical transient requirements (part 1)
- Table 14. Electrical transient requirements (part 2)
- Table 15. Electrical transient requirements (part 3)
- 2.5 Reverse battery protection
- Figure 7. Definition of the delay times measurement
- Figure 8. Definition of the low-side switching times
- Figure 9. Definition of the high-side switching times
- Figure 10. Definition of dynamic cross conduction current during a PWM operation
- Figure 11. Waveforms in full bridge operation (part 1)
- Figure 12. Waveforms in full bridge operation (part 2)
- Figure 13. Definition of delay response time of sense current
- Figure 14. Half-bridge configuration
- Figure 15. Multi-motors configuration
- 3 Package and PCB thermal data
- 3.1 MultiPowerSO-30 thermal data
- 4 Package and packing information
- 5 Order codes
- 6 Revision history
VNH5019A-E Electrical specifications
Doc ID 15701 Rev 7 15/34
Figure 5. Typical application circuit for DC to 20 kHz PWM operation with reverse battery
protection (option B)
)
In case of a fault condition the DIAG
X
/EN
X
pin is considered as an output pin by the device.
The fault conditions are:
● overtemperature on one or both high-sides (for example, if a short to ground occurs as
it could be the case described in line 1 and 2 in the Ta bl e 1 3 );
● Short to battery condition on the output (saturation detection on the low-side
Power MOSFET).
M
μ
C
Reg 5V
+ 5V
HS
A
HS
B
LS
A LS
B
V
CC
DIAG
A
/EN
A
CS
IN
A
PWM
OUT
A
OUT
B
D
S
G
3.3K
1K
1K
1K
10K
33nF
1.5K
V
CC
100K
V
BAT
CP
DIAG
B
/EN
B
+5V
1K
3.3K
IN
B
1K
GND
A
GND
B
C
Note:
The value of the blocking capacitor (C) depends on the application conditions and defines voltage and current ripple onto supply line at PWM
operation. Stored energy of the motor inductance may flyback into the blocking capacitor, if the bridge driver goes into 3-state. This causes a
hazardous overvoltage if the capacitor is not big enough. As basic orientation, 500 µF per 10 A load current is recommended.
Table 12. Truth table in fault conditions (detected on OUT
A
)
IN
A
IN
B
DIAG
A
/EN
A
DIAG
B
/EN
B
OUT
A
OUT
B
CS (V
CSD
=0V)
1 1 0 1 OPEN H High imp.
1 0 0 1 OPEN L High imp.
0 1 0 1 OPEN H I
OUTB
/K
0 0 0 1 OPEN L High imp.
X X 0 0 OPEN OPEN High imp.
X 1 0 1 OPEN H I
OUTB
/K
X 0 0 1 OPEN L High imp.










