Service manual

DEH-3750MP/XU/GS
61
5678
56
7
8
C
D
F
A
B
E
- Pin Functions(UPD63763GJ)
Pin No. Pin Name I/O Function and Operation
1 D.VDD Power supply for digital circuits
2 D1.GND GND for 1.6V digital circuits
3 reset I Input of reset
4-8 AB12-8 I Address bus 12-8 from the microcomputer
9-16 AD7-0 I/O Address/data bus 7-0 to the microcomputer
17 cs I Chip selection
18 ASTB I Address strobe
19 read I Control signals(read)
20 write I Control signals(write)
21 wait O Control signals(wait)
22 INTQ O Interruption signals to the external microcomputer
23, 24 IFMODE0, 1 I Switching the microcomputer I/F 0, 1
25 D1.VDD Power supply for 1.6V digital circuits
26 DA.VDD Power supply for DAC
27 ROUT O Output of audio for the right channel
28 DA.GND GND for DAC
29 REGC Connected to the capacitor for band gap
30 DA.GND GND for DAC
31 LOUT O Output of audio for the left channel
32 DA.VDD Power supply for DAC
33 X.VDD Power supply for the crystal oscillator
34 XTAL I Connected to the crystal oscillator(16.9344MHz)
35 xtal O Connected to the crystal oscillator(16.9344MHz)
36 X.GND Ground for the crystal oscillator
37 VDDREG15 Control of 1.6V regulator
38 PWMSW0 I Setup 0 for PWM output(SD, MD)
39-41 TEST3-1 I Connected to GND
42 PWMSW1 I Setup 1 for PWM output(FD, TD)
43 TESTEN I Connected to GND
44 D1.GND GND for 1.6V digital circuits
45 DIN I Input of audio data
46 DOUT O Output of audio data
47 SCKIN I Clock input for audio data
48 SCKO O Clock output for audio data
49 LRCKIN I Input of LRCK for audio data
50 LRCK O Output LRCK for audio data
51 xtalen I Permission to oscillate 16.9344MHz
52 D1.VDD Power supply for 1.6V digital circuits
53 RFCK/HOLD O Output of RFCK/HOLD signal
54 WFCK/MIRR O Output of WFCK/MIRR signal
55 PLCK/RFOK O Output of PLCK/Output of RFOK
56 LOCK/RFOK O Output of LRCK/Output of RFOK
57 C1D1/C8M O Information on error correction/C8M : 8MHz
58 C1D2/C16M O Information on error correction/C16M : 16MHz
59 C2D1/RMUTE O Information on error correction/Mute for Rch
60 C2D2/LMUTE O Information on error correction/Mute for Lch
61 C2D3/SHOCK O Information on error correction/Detection of vibration
62 D1.GND GND for 1.6V digital circuits
63 C33M O Output of 33.8688MHz(CLK for SDRAM)
64 (rcs) O DRAM cs
65 RA11 O Output of DRAM address 11
66 (CKE) O Output of DRAM CKE
67 ras O Output of DRAM ras
68 cas)(LDQM) O Output of DRAM lower cas(LDQM)
69 cas!(UDQM) O Output of DRAM upper cas(UDQM)
70 we O Output of DRAM we
71 oe(cas) O Output of DRAM oe(cas)
72 D.GND Ground for digital circuits
73-88 RDB0-15 I/O Input/output of DRAM data0-15
89-99 RA0-10 O Output of DRAM address0-10