Data Sheet
12/19
TSZ02201-0M3M0F616080-1-2
© 2014 ROHM Co., Ltd. All rights reserved.
23.May.2016 Rev.002
www.rohm.com
TSZ22111・15・001
BH1745NUC
I
2
C Bus Communication
1) Slave address "0111000" (ADDR = ‘L’) or “0111001” (ADDR = ‘H’)
2) Main write format
1. Case of Indicate register address
ST
Slave Address
W
0
ACK
Indicate register address
ACK
SP
2. Case of write to data register after indicating register address
ST
Slave Address
W
0
ACK
Indicate register address
ACK
Data specified at register
address field
ACK
・・・・・・
ACK
Data specified at register
address field + N
ACK
SP
BH1745NUC continues to receive data with address increments until master issues stop condition.
Write cycle is 40h - 41h - 42h - 43h …57h - 58h - 59h …FFh - 00h - 01h …3Fh - 40h……
All registers are included in write-chain.
Ex) If register address field is 42h, then BH1745NUC writes data like seeing in below.
42h - 43h - 44h - 45h - 46h ……… 3Eh - 3Fh - 40h……. It is continued until master issues stop condition.
*There is no registers in address 00h-3Fh, 43h, 45h – 4Fh, 5Ah – 5Fh and 66h – 91h, 93h-FFh, but it is necessary to
access these registers when writing some data with address increments. It is recommended to access 40h – 42h, 50h
– 50h – 57h and 60h – 65h individually.
3) Main read format
1. Case of read data after indicate register address (Master issues restart condition)
ST
Slave Address
W
0
ACK
Indicate register address
ACK
ST
Slave Address
R
1
ACK
Data specified at register address
field
ACK
Data specified at register
address field + 1
ACK
・・・・・・
ACK
Data specified at register
address field + N
NACK
SP
2. Case of read data
ST
Slave Address
R
1
ACK
Data specified at register address
field
ACK
Data specified at register
address field + 1
ACK
・・・・・・
ACK
Data specified at register address
field + N
NACK
SP
BH1745NUC outputs data from specified address field until master issues stop condition.
Read cycle is 40h - 41h - 42h - 43h …57h - 58h - 59h …FFh - 00h - 01h …3Fh - 40h……
All registers are included in read-chain.
Ex) If register address field is 50h, then BH1745NUC outputs data like seeing in below.
50h – 51h - 52h ……FFh – 00h - 01h…3Fh - 40h… It is continued until master issues stop condition.
*There is no registers in address 00h-3Fh, 43h, 45h – 4Fh, 5Ah – 5Fh and 66h – 91h, 93h-FFh, but it is necessary to
access these registers when reading data with address increments. It is recommended to access 40h – 44h, 50h – 50h
– 57h, 60h – 65h and 92h individually. When master access to register address that does not exists, FFh is read.
*BH1745NUC operates as I
2
C bus slave device.
*Please refer formality I
2
C bus specification of NXP semiconductor
from master to slave
from slave to master