Datasheet

Internal Reset
I
2
S Clocks
SCK, BCK, LRCK
Internal Reset
4 ms
Reset Removal
1.5V
1.8V
DVDD, LDOO
2.8V
3.3V
AVDD, CPVDD
Internal Reset
I
2
S Clocks
SCK, BCK, LRCK
Internal Reset
4 ms
Reset Removal
2.8V
3.3V
AVDD, DVDD,
CPVDD
PCM5100A , PCM5101A , PCM5102A
PCM5100A-Q1 , PCM5101A-Q1 , PCM5102A-Q1
SLAS859C –MAY 2012–REVISED MAY 2015 www.ti.com
11.4 Power-On Reset Function
Power-On Reset, DVDD 3.3-V Supply
The PCM510xA includes a power-on reset function shown in Figure 41. With V
DD
> 2.8 V, the power-on reset
function is enabled. After the initialization period, the PCM510xA is set to its default reset state. Analog output
will begin ramping after valid data has been passing through the device for the given group delay given by the
digital interpolation filter selected.
Figure 41. Power-On Reset Timing, DVDD = 3.3 V
Power-On Reset, DVDD 1.8-V Supply
The PCM510xA includes a power-on reset function shown in Figure 42 operating at DVDD = 1.8 V. With AVDD
greater than approximately 2.8 V, CPVDD greater than approximately 2.8 V, and DVDD greater than
approximately 1.5 V, the power-on reset function is enabled. After the initialization period, the PCM510xA is set
to its default reset state.
Figure 42. Power-On Reset Timing, DVDD = 1.8 V
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