Datasheet

PCM510x
+
+
+
+
470W
470W
3.3V
3.3VA
3.3VA
AGND
AGND
AGND
AGND
2.2nF
Right Channel Line Output
Left Channel Line Output
PCM Audio Source
2.2nF
0.1 Fm
10 Fm
0.1 Fm
10 Fm
10 Fm
0.1 Fm
0.1 Fm
2.2mF
2.2mF
10 Fm
FLT
SCK
BCK
DIN
LRCK
FMT
XSMT
LDOO
DGND
DVDD
CPVDD
CAPP
CPGND
CAPM
VNEG
OUTL
OUTR
AVDD
AGND
DEMP
Mute Circuit
PCM5100A , PCM5101A , PCM5102A
PCM5100A-Q1 , PCM5101A-Q1 , PCM5102A-Q1
SLAS859C –MAY 2012–REVISED MAY 2015 www.ti.com
10 Applications and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
10.1 Application Information
10.1.1 Typical Applications
Figure 33. Simplified Schematic, Hardware-Controlled Subsystem
10.1.1.1 Example Design Requirements
• Device control method: hardware control
– Normal filter latency
– I
2
S digital audio interface
– Power rail monitoring from the system 12-V rail to mute early on system power loss
• Single-ended 2.1-V
RMS
analog outputs
• 3-wire I
2
S interface (BCK PLL)
• Single 3.3-V supply
10.1.1.2 Detailed Design Procedure
• Device control method: See Pin Configuration and Functions and Audio Processing.
– Normal filter latency: FLT pin tied low
– Audio format selection: FMT pin tied low
• Clock and PLL setup (See Reset and System Clock Functions). Ensure incoming BCK meets minimum
requirements.
• XSMT pin setup for 12-V monitoring (See External Power Sense Undervoltage Protection Mode).
• Single-supply 3.3-V operation (See Setting Digital Power Supplies and I/O Voltage Rails)
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Product Folder Links: PCM5100A PCM5101A PCM5102A PCM5100A-Q1 PCM5101A-Q1 PCM5102A-Q1