Specifications
Table Of Contents
- Contents
- 1. Technical Specifications, Connections, and Chassis Overview
- 2. Safety Instructions, Warnings, and Notes
- 3. Directions for Use
- 4. Mechanical Instructions
- 4.1 Disassembly Procedures
- Figure 4-1 Exploded view 51” cabinet
- 4.1.1 Lower Center Back Cover Removal (86)
- 4.1.2 Side Back Cover Removal
- 4.1.3 Large Signal Board Removal (LSB)
- 4.1.4 AC Input Panel Removal
- 4.1.5 Small Signal Module Removal (SSM)
- 4.1.6 Side Jack Panel Removal
- 4.1.7 PIP Panel Removal (if present)
- 4.1.8 Small Signal Board Removal (SSB)
- 4.1.9 Convergence Panel Removal (ACS)
- 4.1.10 Wide Band Video Panel Removal (HOP)
- 4.1.11 Front Control Panel and Left or Right Speaker Removal (5)
- 4.1.12 Upper Back Cover Removal (4)
- 4.1.13 Plastic Light Barrier Removal (Optical Assembly)
- 4.1.14 Mirror Mounting Board Removal (57)
- 4.1.15 Complete Optical Assembly or Individual CRT Assembly Removal
- 4.2 Service Position
- 4.3 Picture Tube Replacement
- 4.4 Set Re-assembly
- 4.1 Disassembly Procedures
- 5. Service Modes, Error Codes, and Fault Finding
- 5.1 Test Conditions
- 5.2 Service Modes
- 5.3 Problems and Solving Tips (related to CSM)
- 5.4 ComPair
- 5.5 Error Codes
- 5.6 The ”Blinking LED” Procedure
- 5.7 Trouble Shooting Tips
- 6. Block Diagrams, Testpoint Overviews, and Waveforms
- 7. Circuit Diagrams and PWB Layouts
- Power Supply Panel: AC Input
- Layout Power Supply Panel (Top Side)
- Layout Power Supply Panel (Bottom Side)
- SSB: SIM Connector (Male)
- SSB: IF, I/O Videoprocessing
- SSB: Feature Box (100Hz Processing)
- SSB: HOP
- SSB: Audio Demodulator
- SSB: Painter
- Layout SSB (Top Side)
- Mapping Layout SSB (Top Side)
- Mapping Layout SSB (Bottom Side)
- Layout SSB (Bottom Side)
- SSM: Tuner
- SSM: I/O’s
- SSM: Video Buffer
- SSM: Convergence HV Output 1
- SSM: Convergence HV Output 2
- SSM: Interconnections
- SSM: Audio Amplifier
- SSM: Headphone Amplifier
- Mapping SSM C1-C8 Part 1
- Mapping SSM C1-C8 Part 2
- Mapping SSM C1-C8 Part 3
- Layout SSM (Top Side)
- Layout SSM (Bottom Side)
- CRT Panel: Red
- CRT Panel: Green
- CRT Panel: Blue
- Mapping CRT Panel: Red, Green, and Blue
- Layout CRT Panel (Top Side)
- Layout CRT Panel (Bottom Side)
- Large Signal Panel
- Large Signal Panel
- Large Signal Panel
- LSP: Diversity Tables
- Layout Large Signal Panel (Top Side)
- Layout Large Signal Panel (Bottom Side)
- Side Jack Panel
- Mapping Side Jack Panel G1
- Layout Side Jack Panel (Top Side)
- Layout Side Jack Panel (Bottom Side)
- ACS Module
- ACS Module
- ACS Module
- Mapping ACS Module H1-H3
- Layout ACS Panel (Top Side)
- Layout ACS Panel (Bottom Side)
- HOP Panel
- HOP Panel
- Diversity HOP Panel J1 and J2
- Mapping HOP Panel Part 1
- Mapping HOP Panel Part 2
- Layout HOP Panel (Top Side)
- Layout HOP Panel (Bottom Side)
- Keyboard Panel
- Mapping Keyboard Panel
- Layout Keyboard Panel (Top and BottomSide)
- UART Interface Module
- Layout UART Interface Modukle
- 8. Alignments
- 8.1 General Alignment Conditions
- 8.2 Hardware alignments
- 8.3 Software Alignments
- 8.4 Convergence and Geometry Adjustments
- 8.5 Option Settings
- 9. Circuit Descriptions, List of Abbreviations, and IC Data Sheets
- 9.1 Introduction
- 9.2 Power Supplies
- 9.3 Video
- Figure 9-7 Video signal block diagram
- 9.3.1 Side Jack Panel
- 9.3.2 SSM composite Inputs
- 9.3.3 SSM Video Switching
- 9.3.4 SSB Video Switching
- 9.3.5 SAW Filter Switching
- 9.3.6 3D Comb Filter
- 9.3.7 Sound Trap Switching
- 9.3.8 1fH Component Buffer Amplifiers
- 9.3.9 Feature Box
- 9.3.10 Eagle
- 9.3.11 ATSC module
- 9.3.12 SSM HOP Buffer Amplifiers
- 9.3.13 HOP RGB/YUV Switching
- 9.3.14 HOP Signal Processing
- 9.3.15 HOP Sharpness Control
- 9.3.16 HOP Tint Control
- 9.3.17 HOP RGB Amplifiers
- 9.3.18 HOP Analogue Control
- 9.3.19 CRT Panel
- 9.3.20 HOP Sync Switching and Processing
- 9.3.21 Line Output
- 9.3.22 Frame Amplifier
- 9.3.23 High Voltage Circuit
- 9.3.24 Shutdown
- 9.3.25 Convergence
- 9.4 Audio
- 9.5 Control/OSD
- 9.6 List of Abbreviations
- 9.7 IC Data Sheets
- 10. Spare Parts List
- 11. Revision List

Circuit Descriptions, List of Abbreviations, and IC Data Sheets
EN 94 DPTV585 AA9.
transistor turned "off". In the same manner, the Negative
Horizontal pulses keep the base of 7810 at a negative voltage
to keep it turned "off". The Protect line is normally Low, keeping
7809 turned "off". The +200-volt source is fed through zener
diodes 6812 and 6816, resistor 3850, the base-emitter of 7906,
the base emitter of 7812 to keep transistor 7813 turned "on".
This turns transistor 7814 "on", which switches the "on" voltage
to the High Voltage module. The conduction of 7812 keeps the
voltage on the G1 line at approximately - 18 Volts, which turns
the CRTs "on". If the Vertical Pulse should fail, transistor 7808
will turn "on", which will turn 7906, 7812, 7813, and 7814 "off".
This will turn the HVG module "off". In addition when 7812 turns
"off", the G1 voltage will go to -200 Volts, blanking the CRTs.
The same sequence will occur if Horizontal should fail, the
Protect line should go "high", or the +200 Volt source should
fail.
9.3.25 Convergence
The Convergence system is split into two sections. The
convergence signal processor is located on the ACS (Auto
Convergence System) module. The output amplifiers are
located on the SSM (Small Signal Module).
Convergence processor
Figure 9-32 Convergence signal processor
The Convergence data is stored in the EEPROM, 7000. The
microprocessor located on the ASC module reads 1,971 bytes
of data from 7000 and writes it to the Convergence Processor,
7002. Horizontal sync is inverted by 7026, buffered by 7025,
and fed to pin 27 of 7002. Vertical sync is inverted by 7027,
buffered by 7028, and fed to pin 28 of 7002. The data is
processed to produce the desired convergence correction
waveforms, which are output on six DACS. During the
convergence adjustment procedure, a 180-point alignment grid
is output on Pins 16, 17, and 18. This signal is mixed with the
OSD to be displayed on the screen. In the 4x3 aspect ratio set,
there are three sets of convergence data. In sets with a 16x9
aspect ratio, there are two sets of convergence data. The set
will require convergence alignment for each set of convergence
data. The correct mode must be selected and the signal for that
mode must be applied to the set during the convergence
alignment. The output of the DACS is fed to six op-amps before
being fed to the Power Amplifiers located on the SSM. When
screen centring is being performed, it is necessary to disable
the convergence drive waveform. A High on pin 77 turns
transistor 7029 "on", turning 7038 "on", which turns transistors
7032, 7033, 7030, 7031, 7034, and 7035 "on". This mutes the
correction drive signal to the Power Amplifiers.
Convergence Horizontal Output
Figure 9-33 Convergence horizontal output circuit
IC 7044 amplifies the Horizontal convergence waveforms. The
correction waveforms are fed to the IC on Pins 6, 14, and 15.
They are output to the Convergence Yokes on Pins 9, 11, and
18. The IC is powered by four supply inputs. A +35 Volt supply
is fed to pin 5, a -35 Volt supply is fed to pin 4, and a -22 Volt
supply is fed to pin 8, 12, and 17. The supply fed to pin 10 is
normally a +22 Volt supply. During signal peak drives, the
voltage on pin 10 is increased to +35 Volts. Feedback sense
voltage is developed across the 6.8 ohm resistors on the return
side of each yoke. Transistor 7007 is part of a Soft Start circuit.
When the set is turned "on", Transistor 7007 turns "on" until
capacitor 2043 is fully charged. While 7007 is being turned
"on", a negative voltage is placed on pin 3 muting the output of
the IC. A 220-ohm snubber resistor is across each of the yoke
windings. This resistor will overheat if the unit is operated with
the Convergence Yokes unplugged.
Convergence Vertical Output
Figure 9-34 Convergence vertical output circuit
IC 7045 amplifies the Vertical convergence waveforms. The
correction waveforms are fed to the IC on Pins 6, 14, and 15.
Output is on Pins 9, 11, and 18 to the Vertical Convergence
yokes. Feedback sense voltage is developed across the 6.8-
ohm resistors on the return side of each yoke. A Snubber
resistor is across each yoke. These resistors will overheat if the
circuit is operated without the Convergence Yokes being
plugged in. The IC is powered by four supplies, +35 Volt, -35
Volt, VccPSW-V, and VCCNSW-V. The VccPSW-V supply is
normally at +22 volts. The BV_OUT, GV_OUT, and RV_OUT
lines are connected to a Vertical Power up circuit, which
senses the drive to the Convergence Yokes. If the drive to the
yokes reaches 10 to 12 Volts, the Vertical Power up circuit will
switch the VccPSW-V supply to +35 Volts. If the Vertical Power
E_15000_099.eps
181004
E_15000_103.eps
181004
E_15000_102.eps
181004










