Specifications

Circuit Descriptions, List of Abbreviations, and IC Data Sheets
EN 105DPTV585 AA 9.
9.7.3 Diagram H1, STV2050 (IC7002)
Figure 9-48 Internal Block Diagram and Pin Configuration
V
G
A
D
VGND
VCCB
V
BAD
V
B
N
D
GNDB
VAG
O
H
A
GO
GNDP
C
FE
R
NFER
VCCP
H
R
A
D
H
R
ND
VCCA
H
G
A
D
H
GND
GNDA
HB
A
D
H
B
N
D
VCCG
GNDG
VCCH
GNDH
2TLF
VCCF
HN
Y
S
VNYS
GNDJ GNDL VCCJ VCCL
TBU7 TBU6 TBU5 TBU4 TBU3 TBU2 TBU1 TBU0
M
A
D
S
MLC
S
GNDQ GNDK VCCQ VCCK
O
A
DS
I
A
DS
SL
C
S
VBLK
T
SET
VCCN
T
S
E
R
KLC
E
GNDN
VIDR
VIDG
VIDB
VCCD GNDD
LCSO
SE
RG
GNDF
T
L
I
F
PORA
PORB PORC
POUT
GNDM
MLIN OPTT
VCCM
OPTI
0S
D
A
GNDC
R
CO
F
S
C
O
F
VCCC
VR
A
D
VR
N
D
I
e
va
lS
C
²
l
ac
i
tre
V
sret
l
iF
latnoz
i
ro
H
s
ret
l
iF
D
A
D
A
D
A
D
A
D
A
D
A
D
A
D
A
D
A
4
4
4
4
1
41
4
1
41
41
41
n
rett
a
P
oe
di
V
r
o
tar
en
eG
D
A
D
A
6
6
h
1
1
1
11
0
no
i
t
a
lop
r
e
t
n
I
t
es
f
f
O
/
n
ia
G
pa
g
dn
a
B
p
o
o
L
d
e
R
yr
o
me
M
ne
e
rG
yr
o
m
e
M
e
u
lB
yro
m
e
M
s
uc
o
F
y
rome
M
l
o
r
tn
oC
re
t
sa
M
C²
I
C²I
r
o
t
a
l
l
ic
sO
z
h
k 004
LL
P
PLL Logic
me
t
s
yS
kc
olC
lacitreV
r
e
t
l
iF
t
es
e
R
c
n
ysV
m
et
s
yS
r
e
d
napx
E
S
U
B
e
c
a
f
ret
n
I
t
r
oP
e
sa
b
emiT
y
r
om
e
M
r
et
s
i
g
e
R
suB
FERI
cig
o
L
le
l
l
a
raP
I
suB
C
²
s
e
i
l
pp
u
S
re
w
oP la
t
i
g
i
D
t
ra
t
S
c
igoL
CAD
e
l
b
anE
gn
im
i
T
di
r
G
gnim
i
T CAD
noitarb
i
la
C
s
e
il
pp
uS
r
ew
oP
g
o
la
nA
CA
D
r
ossecorP sucoF
DAGV
DNGV VCCB
DABV
DNBV
GNDB OGAV
OGAH
GNDP
REFC REFN
GNDI
DARH
DNRH VCCA
DAGH
DNGH GNDA DABH DNBH VCCG GNDG VCCH GNDH
2
T
L
F
FC
CV
HN
YS
V
N
YS
JD
N
G
L
DN
G
JC
C
V
LCCV
7
U
BT
6
UB
T
5
U
BT
4UBT
3
U
BT
2
U
BT
1
U
BT
0
U
BT
SDAM
SCLM
GNDQ
GNDK VCCQ
VCCK
SDAO
SDAI
SCLS
VBLK TEST
VCCN
REST
ECLK
GNDN
VIDR
VIDG
VIDB
VCCD
GNDD
OSCL
GRES GNDF
FILT
1 24
AR
O
P
BROP
CR
O
P
TU
O
P
MD
N
G
NILM
TTP
O
MC
C
V
ITPO
0
S
DA
C
DN
G
RC
O
F
S
C
OF
CC
CV
V
RAD
VR
ND
80
25
40
41 64
65
5 10 15 20
30 35
45 50 55 60
7075
PQFP80
F_15120_046.eps
120805