Specifications
Table Of Contents
- Contents
- 1. Technical Specifications, Connections, and Chassis Overview
- 2. Safety Instructions, Warnings, and Notes
- 3. Directions for Use
- 4. Mechanical Instructions
- 4.1 Disassembly Procedures
- Figure 4-1 Exploded view 51” cabinet
- 4.1.1 Lower Center Back Cover Removal (86)
- 4.1.2 Side Back Cover Removal
- 4.1.3 Large Signal Board Removal (LSB)
- 4.1.4 AC Input Panel Removal
- 4.1.5 Small Signal Module Removal (SSM)
- 4.1.6 Side Jack Panel Removal
- 4.1.7 PIP Panel Removal (if present)
- 4.1.8 Small Signal Board Removal (SSB)
- 4.1.9 Convergence Panel Removal (ACS)
- 4.1.10 Wide Band Video Panel Removal (HOP)
- 4.1.11 Front Control Panel and Left or Right Speaker Removal (5)
- 4.1.12 Upper Back Cover Removal (4)
- 4.1.13 Plastic Light Barrier Removal (Optical Assembly)
- 4.1.14 Mirror Mounting Board Removal (57)
- 4.1.15 Complete Optical Assembly or Individual CRT Assembly Removal
- 4.2 Service Position
- 4.3 Picture Tube Replacement
- 4.4 Set Re-assembly
- 4.1 Disassembly Procedures
- 5. Service Modes, Error Codes, and Fault Finding
- 5.1 Test Conditions
- 5.2 Service Modes
- 5.3 Problems and Solving Tips (related to CSM)
- 5.4 ComPair
- 5.5 Error Codes
- 5.6 The ”Blinking LED” Procedure
- 5.7 Trouble Shooting Tips
- 6. Block Diagrams, Testpoint Overviews, and Waveforms
- 7. Circuit Diagrams and PWB Layouts
- Power Supply Panel: AC Input
- Layout Power Supply Panel (Top Side)
- Layout Power Supply Panel (Bottom Side)
- SSB: SIM Connector (Male)
- SSB: IF, I/O Videoprocessing
- SSB: Feature Box (100Hz Processing)
- SSB: HOP
- SSB: Audio Demodulator
- SSB: Painter
- Layout SSB (Top Side)
- Mapping Layout SSB (Top Side)
- Mapping Layout SSB (Bottom Side)
- Layout SSB (Bottom Side)
- SSM: Tuner
- SSM: I/O’s
- SSM: Video Buffer
- SSM: Convergence HV Output 1
- SSM: Convergence HV Output 2
- SSM: Interconnections
- SSM: Audio Amplifier
- SSM: Headphone Amplifier
- Mapping SSM C1-C8 Part 1
- Mapping SSM C1-C8 Part 2
- Mapping SSM C1-C8 Part 3
- Layout SSM (Top Side)
- Layout SSM (Bottom Side)
- CRT Panel: Red
- CRT Panel: Green
- CRT Panel: Blue
- Mapping CRT Panel: Red, Green, and Blue
- Layout CRT Panel (Top Side)
- Layout CRT Panel (Bottom Side)
- Large Signal Panel
- Large Signal Panel
- Large Signal Panel
- LSP: Diversity Tables
- Layout Large Signal Panel (Top Side)
- Layout Large Signal Panel (Bottom Side)
- Side Jack Panel
- Mapping Side Jack Panel G1
- Layout Side Jack Panel (Top Side)
- Layout Side Jack Panel (Bottom Side)
- ACS Module
- ACS Module
- ACS Module
- Mapping ACS Module H1-H3
- Layout ACS Panel (Top Side)
- Layout ACS Panel (Bottom Side)
- HOP Panel
- HOP Panel
- Diversity HOP Panel J1 and J2
- Mapping HOP Panel Part 1
- Mapping HOP Panel Part 2
- Layout HOP Panel (Top Side)
- Layout HOP Panel (Bottom Side)
- Keyboard Panel
- Mapping Keyboard Panel
- Layout Keyboard Panel (Top and BottomSide)
- UART Interface Module
- Layout UART Interface Modukle
- 8. Alignments
- 8.1 General Alignment Conditions
- 8.2 Hardware alignments
- 8.3 Software Alignments
- 8.4 Convergence and Geometry Adjustments
- 8.5 Option Settings
- 9. Circuit Descriptions, List of Abbreviations, and IC Data Sheets
- 9.1 Introduction
- 9.2 Power Supplies
- 9.3 Video
- Figure 9-7 Video signal block diagram
- 9.3.1 Side Jack Panel
- 9.3.2 SSM composite Inputs
- 9.3.3 SSM Video Switching
- 9.3.4 SSB Video Switching
- 9.3.5 SAW Filter Switching
- 9.3.6 3D Comb Filter
- 9.3.7 Sound Trap Switching
- 9.3.8 1fH Component Buffer Amplifiers
- 9.3.9 Feature Box
- 9.3.10 Eagle
- 9.3.11 ATSC module
- 9.3.12 SSM HOP Buffer Amplifiers
- 9.3.13 HOP RGB/YUV Switching
- 9.3.14 HOP Signal Processing
- 9.3.15 HOP Sharpness Control
- 9.3.16 HOP Tint Control
- 9.3.17 HOP RGB Amplifiers
- 9.3.18 HOP Analogue Control
- 9.3.19 CRT Panel
- 9.3.20 HOP Sync Switching and Processing
- 9.3.21 Line Output
- 9.3.22 Frame Amplifier
- 9.3.23 High Voltage Circuit
- 9.3.24 Shutdown
- 9.3.25 Convergence
- 9.4 Audio
- 9.5 Control/OSD
- 9.6 List of Abbreviations
- 9.7 IC Data Sheets
- 10. Spare Parts List
- 11. Revision List
Circuit Descriptions, List of Abbreviations, and IC Data Sheets
EN 103DPTV585 AA 9.
9.7 IC Data Sheets
This section shows the internal block diagrams and pin layouts
of ICs that are drawn as "black boxes" in the electrical diagrams
(with the exception of "memory" and "logic" ICs).
9.7.1 Diagram B7, SAA5667HL (IC7001)
Figure 9-46 Internal Block Diagram and Pin Configuration
MICROPROCESSOR
(80C51)
SRAM
256 BYTES
ROM
(128 K or 192 KBYTES)
MEMORY
INTERFACE
DISPLAY
R
G
B
VDS
HSYNC
VSYNC
CVBS
DATA
CAPTURE
DRAM
(14 KBYTES)
TV CONTROL
AND
INTERFACE
I
2
C-bus, general I/O
DISPLAY
TIMING
CVBS
DATA
CAPTURE
TIMING
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
5125
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
P3.7
P0.4/INT4
A6
P0.3/INT3
VPE
ALE
PSEN
P0.2/INT2
P0.1/TX
P0.0/RX
A7
EA
P0.5
V
SSP
V
SSC
WR
RD
A14
A15_LN
P3.3/ADC3
P3.2/ADC2
P3.1/ADC1
A17_LN
P3.0/ADC0
P2.7/PWM6
RAMBK.0
VDS
HSYNC
P3.5/INT5
VSYNC
ROMBK.2
ROMBK.1
ROMBK.0
P3.6
V
SSP
INTD
V
SSC
V
DDC
A11
A10
A9
A8
MOVX_WR
OSCGND
XTALIN
XTALOUT
RESET
RESET
MOVX_RD
V
DDP
001
99
89
79
69
59
49
39
29
19
09
98
88
78
68
58
48
38
28
18
08
97
87
77
6
7
MWPT/0.2P
V
CSS
5MWP/6.2P
4
MWP/
5
.2P
3
MWP/
4
.
2P
2
MWP/
3
.2P
1
M
WP
/
2.
2
P
0
MWP/
1
.2P
7DA
6
DA
5DA
4DA
3DA
2DA
1DA
0DA
1A
D
S
/
5.1P
1
LCS/
4
.1P
0ADS
/
7.
1
P
0
L
CS/
6
.1
P
IT/3.1P
0
T
N
I
/
2.
1P
0T/1.1P
N
L
_
6
1A
1TNI/0.1P
5
A
4
A
6.0P
2
T
/7.0P
V
ASS
0SBVC
1SBV
C
KB
_
51A
R
E
TLIF
_
CNYS
FERI
3
1A
21A
3A
2
A
1
A
EMA
R
F
EPV
RO
C
X
E
2
T
/7M
WP
/4
.
3P
V
A
D
D
B
G
R
0
A
1.KBMAR
62
72
82
92
0
3
13
23
33
43
53
63
73
83
9
3
0
4
14
24
34
44
54
6
4
74
8
4
9
4
0
5
GSA020
SAA56xx
Internal Block Diagram
Pin Configuraton
E_15000_115.eps
170305