Specifications

Alignments
EN 75SDI PDP 2K6 8.
8.4 Waveform Alignments 50” HD w1
1. Set the pattern to Full White:
Place jumpers on:
J8902 of the PSU alarm board
J5003 and J5004 of the PSU
Pin 1 and 2 of CN2072 on the Logic Board
When the display starts showing a cycle of different
patterns, push button SW2001 for at least one second.
Now the display shows a continuous full white pattern.
To restart the cycle of different patterns, push the
button once more and wait for a few seconds.
2. Check the waveform using an Oscilloscope.
Triggering through V_TOGG of the LOGIC Board (see
Figure “Logic PWB”).
Connect the “OUT240” test point, located at the centre
of the Y-buffer PWB, to the other channel, and then
check the first Subfield waveform of one TV-Field.
Check the waveform by adjusting the Horizontal
Division of the oscilloscope.
Check the waveform by adjusting the Horizontal
Division of the oscilloscope.
Check the Reset waveform when the V_TOGG level is
changed.
3. Adjust the waveform of the rising ramp with VR5001 (see
Figure “Rising ramp waveform adjustment”).
4. Adjust the waveform of the falling ramp with VR5002 (see
Figure “Falling ramp waveform adjustment”).
Special notice: It is very important, that you execute this
adjustment on the 1st Sub-Field (SF) of the 1st Frame of the
Reset waveform and then move to the 3rd Sub-field for
adjusting.
Figure 8-20 TCP ramp waveform inclination adjustment (Y-Board)
< Main Reset Waveform>
<Rising Ramp> <Falling Ramp>
Adjust VR5001 to set the time of Yf
r
(Main Reset Falling Ramp) like the
below picture.
Oscilloscope Setting : 50V / 20us
Adjust VR5000 to set the time of Yr
r
(Main Reset Rising Ramp) like the
below picture.
Oscilloscope Setting : 50
V / 20us
Rising ramp
Falling ramp
Point of intersection
Point of intersection
1 block
1 block
8 blocks
6 blocks
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