Specifications

IC Data Sheets
EN 36 TCM3.1L LA8.
2009-Jun-05
8.12 Diagram B10, STA333BW (IC U17)
Figure 8-12 Internal block diagram and pin configuration
Block Diagram
Pin Configuration
18520_310_090325.eps
090325
Serial Data Input
Channel mapping
I2C
POWER
PLL
Processor
DDX3A
DDX3B
DDX4A/TWARNEXT
DDX4B/EAPD
SCL SDA
OUT1A
OUT1B
OUT2A
OUT2B
LRCKI
BICKI
RESET
SDI
XTI
PLL_FILTER
CONTROL
STATUS
INT LINE
EQ, Tone,
Volumes
SA
CONFIG
PWDN
Serial Data Input
Channel mapping
I2C
POWER
PLL
Processor
DDX3A
DDX3B
DDX4A/TWARNEXT
DDX4B/EAPD
SCL SDA
OUT1A
OUT1B
OUT2A
OUT2B
LRCKI
BICKI
RESET
SDI
XTI
PLL_FILTER
CONTROL
STATUS
INT LINE
EQ, Tone,
Volumes
SA
CONFIG
PWDN
GND_SUB
SA
TEST MODE
VSS
OUT1A
Vdd
GND_REG
CONFIG
B4TUO/NRAWTB3XDD/B3TUO
VDD_DIG
GND_DIG
PLL_Vdd
POWRDN
SDA
SCL
GND_DIG
V
dd_DIG
18
16
17
15
6
5
4
3
2
21
22
31
32
33
35
34
36
20
1
19 A4TUO/DPAEA3XDD/A3TUO
OUT1B
GND1
V
CC
1
PLL_FILTER
PLL_GND
XTI
9
8
7
28
29
30
IKCIBA2TUO
7201
VCC_REG
V
CC2
GND2
LRCKI
INT_LINE
SDI
14
12
11
23
25
26
OUT2B
RESET
4231