Specifications

Circuit Descriptions, Abbreviation List, and IC Data Sheets
EN 68 TPT1.1HA LA9.
9.4.2 Diagram B2A, M16C/62P
Figure 9-4 Internal block diagram and pin configuration
Block Diagram
Pin Configuration
H_17360_054.eps
140907
Timer (16-bit)
Output (timer A): 5
Input (timer B): 6
Internal peripheral functions
Watchdog timer
(15 bits)
DMAC
(2 channels)
D-A converter
(8 bits X 2 channels)
A-D converter
(10 bits X 8 channels
Expandable up to 26 channels)
UART or
clock synchronous serial I/O
(8 bits X 3 channels)
System clock generator
X
IN -X OUT
X CIN -X COUT
PLL frequency synthesizer
Ring oscillator
M16C/60 series16-bit CPU core
Port P0
8
Port P1
8
Port P2
8
Port P3
8
Port P4
8
Port P5
8
Port P6
8
CRC arithmetic circuit (CCITT )
(Polynomial : X
16
+X
12
+X
5
+1)
Memory
8
7
8
8
01P troP9P troP
8P troP
7P troP
8P troP
5
ROM
(Note 1)
RAM
(Note 2)
Note 1: ROM size depends on microcomputer type.
Note 2: RAM size depends on microcomputer type.
Note 3: Ports P11 to P14 exist only in 128-pin version.
Clock synchronous serial I/O
(8 bits X 2 channels)
R0LR0H
R1H R1L
R2
R3
SB
FLG
USP
ISP
INTB
PC
Multiplier
Port P11
8
Port P14
2
Port P12
8
Port P13
8
Three-phase motor
control circuit
A0
A1
FB
<V CC2 ports>
(Note 3) (Note 3)
(Note 3)
(Note 3)
<V CC1 ports>
V<
1CC
>strop
<V CC1 ports> <V CC2 ports>
1 2 3 4 5 6 7 8 9 101112131415161718192021222324252627282930
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
515253545556575859606162636465666768697071727374757677787980
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
1
00
P0 0 /AN 00 /D 0
P0 1 /AN 01 /D 1
P0 2 /AN 02 /D 2
P0 3 /AN 03 /D 3
P0 4 /AN 04 /D 4
P0 5 /AN 05 /D 5
P0 6 /AN 06 /D 6
P0 7 /AN 07 /D 7
P1
0
D/
8
P1
1
D/
9
P1
2
D/
01
P1
3
D/
11
P1
4
D/
21
V REF
AV SS
V
1CC
X
NI
X
TUO
V
SS
TESER
ssVNC
P8
7
X/
NIC
P8
6
X/
TUOC
ETYB
P2
0
NA/
02
A/
0
D/(
0
)-/
P2
1
NA/
12
A/
1
D/(
1
D/
0
)
P2
2
NA/
22
A/
2
D/(
2
D/
1
)
P2
3
NA/
32
A/
3
D/(
3
D/
2
)
P2
4
NA/
42
A/
4
D/(
4
D/
3
)
2P
5
NA/
52
A/
5
D/(
5
D/
4
)
P2
6
NA/
62
A/
6
D/(
6
D/
5
)
P2
7
NA/
72
A/
7
D/(
7
D/
6
)
3P
0
A/
8
D/-/(
7
)
P3
1
A/
9
P3
2
A/
01
P3
3
A/
11
P3
4
A/
21
P3
5
A/
31
P3
6
A/
41
P3
7
A/
51
P4
0
A/
61
P4
1
A/
71
4P
2
A/
81
P4
3
A/
91
P7
4
2AT/
TUO
W/
P7
6
3AT/
TUO
P5 6 /ALE
P7
7
3AT/
NI
P5 5 /HOLD
P5
4 /HLDA
P5
3 /BCLK
P5
2 /RD
V
2CC
V
SS
P5 7 /RDY/CLK OUT
P4 5 /CS1
P4
6 /CS2
P4
7 /CS3
AV
CC
P6 3 /T X D 0 /SDA 0
P6 5 /CLK 1
P6 6 /RxD 1 /SCL 1
P6 7 /T X D 1 /SDA 1
P6 1 /CLK 0
P6 2 /RxD 0 /SCL 0
P10 0 /AN 0
P10 1 /AN 1
P10 2 /AN 2
P10 3 /AN 3
P9
3
AD/
0
3BT/
NI
P9
4
AD/
1
4BT/
NI
9P
5
4KLC/0XENA/
P9
6
S/1XENA/
TUO
4
P9
1
1BT/
NI
S/
NI
3
P9
2
2BT/
NI
S/
TUO
3
P8
0
4AT/
TUO
U/
P6 0 /CTS 0 /RTS 0
P6 4 /CTS 1 /RTS 1 /CTS0/CLKS1
P7
2
KLC/
2
1AT/
TUO
V/
P8
2
TNI/
0
P7
1
DxR/
2
LCS/
2
0AT/
NI
5BT/
NI
)etoN(
P8
3
TNI/
1
P8
5
IMN/
P9 7 /AD TRG /S IN 4
P4
4 /CS0
P5
0 /WRL/WR
P5
1 /WRH/BHE
9P
0
0BT/
NI
3KLC/
P7
0
T/
X
D
2
ADS/
2
0AT/
TUO
)etoN(
8P
4
TNI/
2
P8
1
4AT/
NI
U/
7P
3
STC/
2
STR/
2
1AT/
NI
V/
P7
5
2AT/
NI
W/
P1
5
D/
31
3TNI/
1P
6
D/
41
4TNI/
P1
7
D/
51
5TNI/
P10 7 /AN 7 /KI 3
P10 6 /AN 6 /KI 2
P10 5 /AN 5 /KI 1
P10 4 /AN 4/ KI 0
Package: 100P6S-A
M16C/62P Group
Note: P70 and P7 1 are N channel open-drain output pins.