Propeller Manual

JMPRET – Assembly Language Reference
Page 302 · Propeller Manual v1.1
address indicated by Task2. Since we initialized Task2 to point to SecondTask, the second
task will now be executed.
SecondTask performs some operations denoted by “…” and reaches another JMPRET
instruction,
jmpret Task2,Task1. Note that this is similar to FirstTask’s JMPRET instruction
except the order of
Task1 and Task2 is reversed. This JMPRET instruction saves the return
address (PC + 1, the address of
<more second task code>) into the s-field of the Task2
register, then it jumps to the address indicated by Task1. Since Task1 contains the address of
<more first task code>, as written by the previous JMPRET instruction, execution now
switches back to
FirstTask starting with the <more first task code> line.
Execution continues to switch back and forth between
FirstTask and SecondTask wherever
the
JMPRET instruction exists, faithfully returning to where the previous task left off last time.
Each
JMPRET instruction overwrites the previously used destination address with the new
return address and then jumps to the new destination; the return address from last time.
This multitasking concept can be applied in a number of ways. For example, removing one
of the JMPRET instructions from SecondTask will cause FirstTask to receive fewer cog cycles
per unit of time. Techniques like this may be used allocate more cog cycles to time-sensitive
tasks, or to time-sensitive portions of tasks. It’s also possible to introduce more
Task registers
to multitask between three or more routines in the same cog. The processing time of each
task is always determinate and based upon where the
JMPRET instructions are placed and
which tasks they refer to.
Note that the state of the flags, C and Z, are unchanged and are not stored between these
logical task-switching events. For this reason, it is important to switch between tasks only
when the flags are no longer needed or are not in danger of changing states before execution
returns.
JMPRET is a superset of the CALL instruction; in fact, it is the same opcode as CALL but with the
i-field and d-field configured by the developer, rather than the assembler. See
CALL on page
268 for more information.
The return address (PC + 1) is written to the source (s-field) of the RetInstAddr register unless
the
NR effect is specified. Of course, specifying NR is not recommended for the JMPRET
instruction since that turns it into a
JMP, or RET, instruction.