Propeller Manual

Introducing the Propeller Chip
Page 28 · Propeller Manual v1.1
CLK Register
The CLK register is the System Clock configuration control; it determines the source of and
the characteristics for the System Clock. More precisely, the CLK register configures the RC
Oscillator, Clock PLL, Crystal Oscillator, and Clock Selector circuits. (See Figure 1-2:
Propeller Chip Block Diagram on page 20.) It is configured at compile time by the
_CLKMODE
constant (page 68) and is writable at run time through the
CLKSET Spin command (page 71) or
the
CLKSET assembly instruction (page 271). Whenever the CLK register is written, a global
delay of ≈75 µs occurs as the clock source transitions.
Whenever this register is changed, a copy of the value written should be placed in the Clock
Mode value location (which is BYTE[4] in Main RAM) and the resulting master clock
frequency should be written to the Clock Frequency value location (which is LONG[0] in
Main RAM) so that objects which reference this data will have current information for their
timing calculations. (See
CLKMODE, page 67, and CLKFREQ, page 63.) When possible, it is
recommended to use Spin’s
CLKSET command (page 71), since it automatically updates all the
above-mentioned locations with the proper information.
Only certain bit patterns in the CLK register are valid clock modes. See the
_CLKMODE
constant on page 68 and Table 2-4 on page 69 for more information. The Clock object in the
Propeller Library may also be useful since it provides clock modification and timing
methods.
Table 1-5: CLK Register Structure
Bit 7 6 5 4 3 2 1 0
Name
RESET PLLENA OSCENA OSCM1 OSCM0 CLKSEL2 CLKSEL1 CLKSEL0
Table 1-6: CLK Register RESET (Bit 7)
Bit Effect
0 Always write ‘0’ here unless you intend to reset the chip.
1
Same as a hardware reset – reboots the chip. The Spin command
REBOOT writes a ‘1’
to the RESET bit.
T