Propeller Manual
Table Of Contents
- Preface
- Chapter 1 : Introducing the Propeller Chip
- Concept
- Package Types
- Pin Descriptions
- Specifications
- Hardware Connections
- Boot Up Procedure
- Run-Time Procedure
- Shutdown Procedure
- Block Diagram
- Shared Resources
- System Clock
- Cogs (processors)
- Hub
- I/O Pins
- System Counter
- CLK Register
- Locks
- Main Memory
- Main RAM
- Main ROM
- Character Definitions
- Log and Anti-Log Tables
- Sine Table
- Boot Loader and Spin Interpreter
- Chapter 2 : Spin Language Reference
- Structure of Propeller Objects/Spin
- Categorical Listing of Propeller Spin Language
- Spin Language Elements
- ABORT
- BYTE
- BYTEFILL
- BYTEMOVE
- CASE
- CHIPVER
- CLKFREQ
- _CLKFREQ
- CLKMODE
- _CLKMODE
- CLKSET
- CNT
- COGID
- COGINIT
- COGNEW
- COGSTOP
- CON
- CONSTANT
- Constants (pre-defined)
- CTRA, CTRB
- DAT
- DIRA, DIRB
- FILE
- FLOAT
- _FREE
- FRQA, FRQB
- IF
- IFNOT
- INA, INB
- LOCKCLR
- LOCKNEW
- LOCKRET
- LOCKSET
- LONG
- LONGFILL
- LONGMOVE
- LOOKDOWN, LOOKDOWNZ
- LOOKUP, LOOKUPZ
- NEXT
- OBJ
- Operators
- Expression Workspace
- Operator Attributes
- Unary / Binary
- Normal / Assignment
- Constant and/or Variable Expression
- Level of Precedence
- Intermediate Assignments
- Constant Assignment ‘=’
- Variable Assignment ‘:=’
- Add ‘+’, ‘+=’
- Positive ‘+’ (unary form of Add)
- Subtract ‘-’, ‘-=’
- Negate ‘-’ (unary form of Subtract)
- Decrement, pre- or post- ‘- -’
- Increment, pre- or post- ‘+ +’
- Multiply, Return Low ‘*’, ‘*=’
- Multiply, Return High ‘**’, ‘**=’
- Divide ‘/’, ‘/=’
- Modulus ‘//’, ‘//=’
- Limit Minimum ‘#>’, ‘#>=’
- Limit Maximum ‘<#’, ‘<#=’
- Square Root ‘^^’
- Absolute Value ‘||’
- Sign-Extend 7 or Post-Clear ‘~’
- Sign-Extend 15 or Post-Set ‘~~’
- Shift Arithmetic Right ‘~>’, ‘~>=’
- Random ‘?’
- Bitwise Decode ‘|<’
- Bitwise Encode ‘>|’
- Bitwise Shift Left ‘<<’, ‘<<=’
- Bitwise Shift Right ‘>>’, ‘>>=’
- Bitwise Rotate Left ‘<-’, ‘<-=’
- Bitwise Rotate Right ‘->’, ‘->=’
- Bitwise Reverse ‘><’, ‘><=’
- Bitwise AND ‘&’, ‘&=’
- Bitwise OR ‘|’, ‘|=’
- Bitwise XOR ‘^’, ‘^=’
- Bitwise NOT ‘!’
- Boolean AND ‘AND’, ‘AND=’
- Boolean OR ‘OR’, ‘OR=’
- Boolean NOT ‘NOT’
- Boolean Is Equal ‘==’, ‘===’
- Boolean Is Not Equal ‘<>’, ‘<>=’
- Boolean Is Less Than ‘<’, ‘<=’
- Boolean Is Greater Than ‘>’, ‘>=’
- Boolean Is Equal or Less ‘=<’, ‘=<=’
- Boolean Is Equal or Greater ‘=>’, ‘=>=’
- Symbol Address ‘@’
- Object Address Plus Symbol ‘@@’
- OUTA, OUTB
- PAR
- PHSA, PHSB
- PRI
- PUB
- QUIT
- REBOOT
- REPEAT
- RESULT
- RETURN
- ROUND
- SPR
- _STACK
- STRCOMP
- STRING
- STRSIZE
- Symbols
- TRUNC
- VAR
- VCFG
- VSCL
- WAITCNT
- WAITPEQ
- WAITPNE
- WAITVID
- WORD
- WORDFILL
- WORDMOVE
- _XINFREQ
- Chapter 3 : Assembly Language Reference
- The Structure of Propeller Assembly
- Categorical Listing of Propeller Assembly Language
- Assembly Language Elements
- ABS
- ABSNEG
- ADD
- ADDABS
- ADDS
- ADDSX
- ADDX
- AND
- ANDN
- CALL
- CLKSET
- CMP
- CMPS
- CMPSUB
- CMPSX
- CMPX
- CNT
- COGID
- COGINIT
- COGSTOP
- Conditions ( IF_x )
- CTRA, CTRB
- DIRA, DIRB
- DJNZ
- Effects ( WC, WZ, WR, NR )
- FIT
- FRQA, FRQB
- HUBOP
- IF_x (Conditions)
- INA, INB
- JMP
- JMPRET
- LOCKCLR
- LOCKNEW
- LOCKRET
- LOCKSET
- MAX
- MAXS
- MIN
- MINS
- MOV
- MOVD
- MOVI
- MOVS
- MUXC
- MUXNC
- MUXNZ
- MUXZ
- NEG
- NEGC
- NEGNC
- NEGNZ
- NEGZ
- NOP
- NR
- Operators
- OR
- ORG
- OUTA, OUTB
- PAR
- PHSA, PHSB
- RCL
- RCR
- RDBYTE
- RDLONG
- RDWORD
- Registers
- RES
- RET
- REV
- ROL
- ROR
- SAR
- SHL
- SHR
- SUB
- SUBABS
- SUBS
- SUBSX
- SUBX
- SUMC
- SUMNC
- SUMZ
- Symbols
- TEST
- TESTN
- TJNZ
- TJZ
- VCFG
- VSCL
- WAITCNT
- WAITPEQ
- WAITPNE
- WAITVID
- WC
- WR
- WRBYTE
- WRLONG
- WRWORD
- WZ
- XOR
- Appendix A: Reserved Word List
- Appendix B: Math Samples and Function Tables
- Index
Assembly Language Reference
Notes for Master Table
Note 1: Clock Cycles for Hub Instructions
Hub instructions require 7 to 22 clock cycles to execute depending on the relation between
the cog’s hub access window and the instruction’s moment of execution. The Hub provides a
hub access window to each cog every 16 clocks. Because each cog runs independently of the
Hub, it must sync to the Hub when executing a hub instruction. The first hub instruction in a
sequence will take from 0 to 15 clocks to sync up to the hub access window, and 7 clocks
afterwards to execute; thus the 7 to 22 (15 + 7) clock cycles to execute. After the first hub
instruction, there will be 9 (16 – 7) free clocks before a subsequent hub access window
arrives for that cog; enough time to execute two 4-clock instructions without missing the next
hub access window. To minimize clock waste, you can insert two normal instructions
between any two otherwise-contiguous hub instructions without any increase in execution
time. Beware that hub instructions can cause execution timing to appear indeterminate;
particularly the first hub instruction in a sequence.
Note 2: Clock Cycles for Modify-Branch Instructions
Instructions that modify a value and possibly jump, based on the result, require a different
amount of clock cycles depending on whether or not a jump is required. These instructions
take 4 clock cycles if a jump is required and 8 clock cycles if no jump is required. Since
loops utilizing these instructions typically need to be fast, they are optimized in this way for
speed.
Note 3:
ADDABS C out: If S is negative, C = the inverse of unsigned borrow (for D-S).
Note 4:
SUBABS C out: If S is negative, C = the inverse of unsigned carry (for D+S).
Page 256 · Propeller Manual v1.1