Propeller Manual

VCSL – Spin Language Reference
VSCL
Register: Video Scale Register.
((PUB ┆ PRI))
VSCL
Returns: Current value of cog’s Video Scale Register, if used as a source variable.
Explanation
VSCL is one of two registers (VCFG and VSCL) that affect the behavior of a cog’s Video
Generator. Each cog has a video generator module that facilitates transmitting video image
data at a constant rate. The
VSCL register sets the rate at which video data is generated.
Table 2-22: VSCL Register
VSCL Bits
31..20 19..12 11..0
 PixelClocks FrameClocks
PixelClocks
The 8-bit PixelClocks field indicates the number of clocks per pixel; the number of clocks
that should elapse before each pixel is shifted out by the video generator module. These
clocks are the PLLA clocks, not the System Clock.
FrameClocks
The 12-bit FrameClocks field indicates the number of clocks per frame; the number of clocks
that should elapse before each frame is shifted out by the video generator module. These
clocks are the PLLA clocks, not the System Clock. A frame is one long of pixel data
(delivered via the
WAITVID command). Since the pixel data is either 16 bits by 2 bits, or 32
bits by 1 bit (meaning 16 pixels wide with 4 colors, or 32 pixels wide with 2 colors,
respectively), the FrameClocks is typically 16 or 32 times that of the PixelClocks value.
Using VSCL
VSCL can be read/written like other registers or pre-defined variables. For example:
VSCL := %000000000000_10100000_101000000000
Page 216 · Propeller Manual v1.1