Propeller Manual
Table Of Contents
- Preface
- Chapter 1 : Introducing the Propeller Chip
- Concept
- Package Types
- Pin Descriptions
- Specifications
- Hardware Connections
- Boot Up Procedure
- Run-Time Procedure
- Shutdown Procedure
- Block Diagram
- Shared Resources
- System Clock
- Cogs (processors)
- Hub
- I/O Pins
- System Counter
- CLK Register
- Locks
- Main Memory
- Main RAM
- Main ROM
- Character Definitions
- Log and Anti-Log Tables
- Sine Table
- Boot Loader and Spin Interpreter
- Chapter 2 : Spin Language Reference
- Structure of Propeller Objects/Spin
- Categorical Listing of Propeller Spin Language
- Spin Language Elements
- ABORT
- BYTE
- BYTEFILL
- BYTEMOVE
- CASE
- CHIPVER
- CLKFREQ
- _CLKFREQ
- CLKMODE
- _CLKMODE
- CLKSET
- CNT
- COGID
- COGINIT
- COGNEW
- COGSTOP
- CON
- CONSTANT
- Constants (pre-defined)
- CTRA, CTRB
- DAT
- DIRA, DIRB
- FILE
- FLOAT
- _FREE
- FRQA, FRQB
- IF
- IFNOT
- INA, INB
- LOCKCLR
- LOCKNEW
- LOCKRET
- LOCKSET
- LONG
- LONGFILL
- LONGMOVE
- LOOKDOWN, LOOKDOWNZ
- LOOKUP, LOOKUPZ
- NEXT
- OBJ
- Operators
- Expression Workspace
- Operator Attributes
- Unary / Binary
- Normal / Assignment
- Constant and/or Variable Expression
- Level of Precedence
- Intermediate Assignments
- Constant Assignment ‘=’
- Variable Assignment ‘:=’
- Add ‘+’, ‘+=’
- Positive ‘+’ (unary form of Add)
- Subtract ‘-’, ‘-=’
- Negate ‘-’ (unary form of Subtract)
- Decrement, pre- or post- ‘- -’
- Increment, pre- or post- ‘+ +’
- Multiply, Return Low ‘*’, ‘*=’
- Multiply, Return High ‘**’, ‘**=’
- Divide ‘/’, ‘/=’
- Modulus ‘//’, ‘//=’
- Limit Minimum ‘#>’, ‘#>=’
- Limit Maximum ‘<#’, ‘<#=’
- Square Root ‘^^’
- Absolute Value ‘||’
- Sign-Extend 7 or Post-Clear ‘~’
- Sign-Extend 15 or Post-Set ‘~~’
- Shift Arithmetic Right ‘~>’, ‘~>=’
- Random ‘?’
- Bitwise Decode ‘|<’
- Bitwise Encode ‘>|’
- Bitwise Shift Left ‘<<’, ‘<<=’
- Bitwise Shift Right ‘>>’, ‘>>=’
- Bitwise Rotate Left ‘<-’, ‘<-=’
- Bitwise Rotate Right ‘->’, ‘->=’
- Bitwise Reverse ‘><’, ‘><=’
- Bitwise AND ‘&’, ‘&=’
- Bitwise OR ‘|’, ‘|=’
- Bitwise XOR ‘^’, ‘^=’
- Bitwise NOT ‘!’
- Boolean AND ‘AND’, ‘AND=’
- Boolean OR ‘OR’, ‘OR=’
- Boolean NOT ‘NOT’
- Boolean Is Equal ‘==’, ‘===’
- Boolean Is Not Equal ‘<>’, ‘<>=’
- Boolean Is Less Than ‘<’, ‘<=’
- Boolean Is Greater Than ‘>’, ‘>=’
- Boolean Is Equal or Less ‘=<’, ‘=<=’
- Boolean Is Equal or Greater ‘=>’, ‘=>=’
- Symbol Address ‘@’
- Object Address Plus Symbol ‘@@’
- OUTA, OUTB
- PAR
- PHSA, PHSB
- PRI
- PUB
- QUIT
- REBOOT
- REPEAT
- RESULT
- RETURN
- ROUND
- SPR
- _STACK
- STRCOMP
- STRING
- STRSIZE
- Symbols
- TRUNC
- VAR
- VCFG
- VSCL
- WAITCNT
- WAITPEQ
- WAITPNE
- WAITVID
- WORD
- WORDFILL
- WORDMOVE
- _XINFREQ
- Chapter 3 : Assembly Language Reference
- The Structure of Propeller Assembly
- Categorical Listing of Propeller Assembly Language
- Assembly Language Elements
- ABS
- ABSNEG
- ADD
- ADDABS
- ADDS
- ADDSX
- ADDX
- AND
- ANDN
- CALL
- CLKSET
- CMP
- CMPS
- CMPSUB
- CMPSX
- CMPX
- CNT
- COGID
- COGINIT
- COGSTOP
- Conditions ( IF_x )
- CTRA, CTRB
- DIRA, DIRB
- DJNZ
- Effects ( WC, WZ, WR, NR )
- FIT
- FRQA, FRQB
- HUBOP
- IF_x (Conditions)
- INA, INB
- JMP
- JMPRET
- LOCKCLR
- LOCKNEW
- LOCKRET
- LOCKSET
- MAX
- MAXS
- MIN
- MINS
- MOV
- MOVD
- MOVI
- MOVS
- MUXC
- MUXNC
- MUXNZ
- MUXZ
- NEG
- NEGC
- NEGNC
- NEGNZ
- NEGZ
- NOP
- NR
- Operators
- OR
- ORG
- OUTA, OUTB
- PAR
- PHSA, PHSB
- RCL
- RCR
- RDBYTE
- RDLONG
- RDWORD
- Registers
- RES
- RET
- REV
- ROL
- ROR
- SAR
- SHL
- SHR
- SUB
- SUBABS
- SUBS
- SUBSX
- SUBX
- SUMC
- SUMNC
- SUMZ
- Symbols
- TEST
- TESTN
- TJNZ
- TJZ
- VCFG
- VSCL
- WAITCNT
- WAITPEQ
- WAITPNE
- WAITVID
- WC
- WR
- WRBYTE
- WRLONG
- WRWORD
- WZ
- XOR
- Appendix A: Reserved Word List
- Appendix B: Math Samples and Function Tables
- Index
SPR – Spin Language Reference
SPR
Register: Special Purpose Register array; provides indirect access to cog’s special registers.
((PUB ┆ PRI))
SPR [Index]
Returns: Value in special purpose register at Index.
•
Index is an expression that specifies the index (0-15) of the special purpose register to
access (
PAR through VSCL).
Explanation
SPR is an array of the 16 special purpose registers in the cog. Element 0 is the PAR register
and element 15 is the
VSCL register. See Table 2-15 below. SPR provides an indirect method
of accessing the cog’s special purpose registers.
Table 2-15: Cog RAM Special Purpose Registers
Name Index Type Description
PAR 0
Read-Only Boot Parameter
CNT 1
Read-Only System Counter
INA 2
Read-Only Input States for P31 - P0
INB 3
Read-Only Input States for P63- P32
1
OUTA 4
Read/Write Output States for P31 - P0
OUTB 5
Read/Write Output States for P63 – P32
1
DIRA 6
Read/Write Direction States for P31 - P0
DIRB 7
Read/Write Direction States for P63 - P32
1
CTRA 8
Read/Write Counter A Control
CTRB 9
Read/Write Counter B Control
FRQA 10
Read/Write Counter A Frequency
FRQB 11
Read/Write Counter B Frequency
PHSA 12
Read/Write Counter A Phase
PHSB 13
Read/Write Counter B Phase
VCFG 14
Read/Write Video Configuration
VSCL 15
Read/Write Video Scale
Note 1: Reserved for future use
Page 200 · Propeller Manual v1.1