Datasheet

Propeller™ P8X32A Datasheet www.parallax.com
Copyright © Parallax Inc. Page 7 of 37 Rev 1.1 9/12/2008
4.3. Cogs (processors)
The Propeller contains eight (8) identical, independent
processors, called cogs, numbered 0 to 7. Each cog
contains a Processor block, local 2 KB RAM configured
as 512 longs (512 x 32 bits), two advanced counter
modules with PLLs, a Video Generator, I/O Output
Register, I/O Direction Register, and other registers not
shown in the Block Diagram.
All eight cogs are driven from the System Clock; they
each maintain the same time reference and all active cogs
execute instructions simultaneously. They also all have
access to the same shared resources.
Cogs can be started and stopped at run time and can be
programmed to perform tasks simultaneously, either
independently or with coordination from other cogs
through Main RAM. Each cog has its own RAM, called
Cog RAM, which contains 512 registers of 32 bits each.
The Cog RAM is all general purpose RAM except for the
last 16 registers, which are special purpose registers, as
described in Table 15 on page 16.
4.4. Hub
To maintain system integrity, mutually-exclusive
resources must not be accessed by more than one cog at a
time. The Hub controls access to mutually-exclusive
resources by giving each cog a turn in a “round robin”
fashion from Cog 0 through Cog 7 and back to Cog 0
again. The Hub and its bus run at half the System Clock
rate, giving a cog access to mutually-exclusive resources
once every 16 System Clock cycles. Hub instructions, the
Propeller Assembly instructions that access mutually-
exclusive resources, require 7 cycles to execute but they
first need to be synchronized to the start of the Hub
Access Window.
It takes up to 15 cycles (16 minus 1, if we just missed it)
to synchronize to the Hub Access Window plus 7 cycles
to execute the hub instruction, so hub instructions take
from 7 to 22 cycles to complete.
Figure 2 and Figure 3 show examples where Cog 0 has a
hub instruction to execute. Figure 2 shows the best-case
scenario; the hub instruction was ready right at the start of
that cog’s access window. The hub instruction executes
immediately (7 cycles) leaving an additional 9 cycles for
other instructions before the next Hub Access Window
arrives.
Figure 3 shows the worst-case scenario; the hub
instruction was ready on the cycle right after the start of
Cog 0’s access window; it just barely missed it. The cog
waits until the next Hub Access Window (15 cycles later)
then the hub instruction executes (7 cycles) for a total of
22 cycles for that hub instruction. Again, there are 9
additional cycles after the hub instruction for other
instructions to execute before the next Hub Access
Window arrives. To get the most efficiency out of
Propeller Assembly routines that have to frequently
access mutually-exclusive resources, it can be beneficial
to interleave non-hub instructions with hub instructions to
lessen the number of cycles waiting for the next Hub
Access Window. Since most Propeller Assembly
instructions take 4 clock cycles, two such instructions can
be executed in between otherwise contiguous hub
instructions.
Keep in mind that a particular cog’s hub instructions do
not, in any way, interfere with other cogs’ instructions
because of the Hub mechanism. Cog 1, for example, may
start a hub instruction during System Clock cycle 2, in
both of these examples, possibly overlapping its execution
with that of Cog 0 without any ill effects. Meanwhile, all
other cogs can continue executing non-hub instructions,
or awaiting their individual hub access windows
regardless of what the others are doing.
Figure 2: Cog-Hub
Interaction – Best Case
Scenario
Figure 3: Cog-Hub
Interaction – Worst Case
Scenario