BASIC stamp manual v2.2

4: BASIC Stamp Architecture – Memory Organization
BASIC Stamp Syntax and Reference Manual 2.2 • www.parallax.com • Page 83
the variable RAM for these models, only the BS2p40 module has the extra
16 I/O pins for which this feature is intended.
The word variable INS is unique in that it is read-only. The 16 bits of INS
reflect the state of I/O pins P0 through P15. It may only be read, not
written. OUTS contains the states of the 16 output latches. DIRS controls
the direction (input or output) of each of the 16 I/O pins.
A 0 in a particular DIRS bit makes the corresponding pin an input and a 1
makes the corresponding pin an output. So if bit 5 of DIRS is 0 and bit 6 of
DIRS is 1, then I/O pin 5 (P5) is an input and I/O pin 6 (P6) is an output.
A pin that is an input is at the mercy of circuitry outside the BASIC Stamp;
the BASIC Stamp cannot change its state. A pin that is an output is set to
the state indicated by the corresponding bit of the OUTS register.
When the BASIC Stamp is powered up, or reset, all memory locations are
cleared to 0, so all pins are inputs (DIRS = %0000000000000000). Also, if
the PBASIC program sets all the I/O pins to outputs (DIRS =
%1111111111111111), then they will initially output low, since the output
latch (OUTS) is cleared to all zeros upon power-up or reset, as well.
Table 4.2: RAM Organization for
all BS2 models.
NOTE: There are 16 words, of
two bytes each for a total of 32
bytes*. All bits are individually
addressable through variable
modifiers; the bits within the
upper three words are also
individually addressable though
the pre-defined names shown.
All registers are word, byte,
nibble and bit addressable.
*The BS2p, BS2pe, and BS2px
have an additional set of INS,
OUTS, and DIRS registers that
are switched in and out of the
memory map in place of the main
INS, OUTS, and DIRS registers
by using AUXIO, MAINIO, and
IOTERM. Only the BS2p40 has
the required extra I/O pins this
feature is intended for.
Word Name Byte Names Nibble Names Bit Names Special Notes
INS*
INL, INH INA, INB
INC, IND
IN0 – IN7
IN8 – IN15
Input pins
OUTS*
OUTL, OUTH OUTA, OUTB
OUTC, OUTD
OUT0 – OUT7
OUT8 – OUT15
Output pins
DIRS*
DIRL, DIRH DIRA, DIRB
DIRC, DIRD
DIR0 – DIR7
DIR8 – DIR15
I/O pin direction control
W0 B0, B1
W1 B2, B3
W2 B4, B5
W3 B6, B7
W4 B8, B9
W5 B10, B11
W6 B12, B13
W7 B14, B15
W8 B16, B17
W9 B18, B19
W10 B20, B21
W11 B22, B23
W12 B24, B25
THE INPUT/OUTPUT VARIABLES.