Datasheet

Copyright © Parallax Inc. Pololu Dual MC33926 (#28820) v1.0 11/18/2011 Page 4 of 6
Absolute Maximum Ratings
Symbol
Quantity
Maximum
Units
Vcc
Supply Voltage †
28
V
Pin Definitions and Ratings
Pin
Default
Function
VIN
HIGH
Main 5-28V motor power supply connection
GND
LOW
Ground connection for logic and motor power supplies
OUT2
HIGH
The motor output pin controlled by IN2
OUT1
HIGH
The motor output pin controlled by IN1
VDD
HIGH
3-5 V logic supply connection. This pin is used only for the SF pull-up and default-
overriding jumpers; in the rare case where none of those features is used, VDD
can be left disconnected
IN2
HIGH
The logic input control of OUT2. PWM can be applied to this pin (typically done
with both disable lines inactive)
IN1
HIGH
The logic input control of OUT1. PWM can be applied to this pin (typically done
with both disable pins inactive)
PWM / D2
LOW
Disable input: when D1 is high, OUT1 and OUT2 are set to high impedance. A D1
PWM duty cycle of 70% gives a motor duty cycle of 30%. Typically, only one of
the two disable pins is used, but the default is for both disable pins to be active.
PWM / D1
HIGH
Disable input: when D1 is high, OUT1 and OUT2 are set to high impedance. A D1
PWM duty cycle of 70% gives a motor duty cycle of 30%. Typically, only one of
the two disable pins is used, but the default is for both disable pins to be active.
SF
HIGH
Status flag output: an over-current (short circuit) or over-temperature event will
cause SF to be latched LOW. If either of the disable pins (D1 or D2) are disabling
the outputs, SF will also be LOW. Otherwise, this pin is weakly pulled high. This
allows the two SF pins on the board to be tied together and connected to a single
MCU input.
FB
LOW
The FB output provides analog current-sense feedback of approximately 525 mV
per amp.
EN
LOW
Enable input: when EN is LOW, both motor ICs are in a low-current sleep mode.
SLEW
LOW
Output slew rate selection input. A logical LOW results in a slow output rise time
(1.5 μs – 6 μs). A logical HIGH selects a fast output rise time (0.2 μs – 1.45 μs).
This pin should be set HIGH for high-frequency (over 10 kHz) PWM. This pin
determines the slew rate mode for both motor driver ICs.
INV
LOW
A logical high value inverts the meaning of IN1 and IN2 for both motor drivers.