Microcomputer User's Manual

Chapter 8 Appendices
137
EPROM Versions
8-1-7 Option Bit
The MN101C117 and the MN101CP117 control the oscillation mode after resetting
as well as the runaway-detection watch dog timer, using bit 2 to 0 of the last address
(X'7FFF) of the built-in ROM.
■
Option bit
Fig. 8-1-2 Option bit(Address: X'07FFF')
01245673
0
1
Slow mode
Selection of oscillation mode 
after resetting 

NORMAL mode
NSSTRT
WDSEL2 WDSEL1 PKGSEL2 PKGSEL1 NSSTRT
0
1
fs/2
Watchdog timer cycle setting
fs/2
WDSEL2 WDSEL1
0
1
X
fs/2
16
18
20
0
1
SDIP042-P-0600
QFP044-P-1010
QFH048-P-0707
Package
PKGSEL2 PKGSEL1
X
0
1