Datasheet

CLASSIFICATION
PRODUCT SPECIFICATION
No.
DS-1740-2400-102
REV.
1.2
SUBJECT
CLASS 2 BLUETOOTH LOW ENERGY
SINGLE MODE MODULE
PAGE
8 of 34
PANASONIC’S CODE
ENW89846A1KF
DATE
22.04.2014
PANASONIC INDUSTRIAL DEVICES EUROPE GMBH
www.pideu.panasonic.de
5.2.4 Functional Modes
The PAN1740 is optimized for embedded applications such as health monitoring, sports
measuring, human interaction devices, etc. Customers are able to develop and test their
own applications. Upon completion of development, the application code can be
programmed into the OTP. In general, the system has three functional modes of operation:
A. Development Mode: During this phase application code is developed using the ARM
Cortex M0 SW environment. The compiled code is then downloaded into the System
RAM or any Retention RAMs by means of SWD (JTAG) or any serial interface (e.g.
UART). Address 0x00 is remapped to the physical memory that contains the code and
the CPU is configured to reset and execute code from the remapped device. This mode
enables application development, debugging and on-the-fly testing.
B. Normal Mode: After the application is completed and verified, the code can be burned
into the OTP. When the system boots/wakes up, the DMA of the OTP controller will
automatically copy the program code from the OTP into the system RAM. Next, a SW
reset will remap address 0x00 to the System RAM and code execution is started.
Hence, in this mode, the system is autonomous, contains the required SW in OTP and
is ready for integration into the final product.
C. Calibration Mode: Programming the Bluetooth device address is completed in
Calibration Mode.
5.2.5 Power Modes
There are four different power modes in the PAN1740:
o Active Mode: System is active and operates at full speed.
Sleep Mode: No power gating has been programmed, the ARM CPU is idle, waiting
for an interrupt. PD_SYS is on. PD_PER and PED_RAD depending on the
programmed enabled value.
Extended Sleep Mode: All power domains are off except for the PD_AON, the
programmed PD_RRx and the PD_SR. Since the SysRAM retains its data, no OTP
mirroring is required upon waking up the system.
Deep Sleep Mode: All power domains are off except for the PD_AON and the
programmed PD_RRx. This mode dissipates the minimum leakage power. However,
since the SysRAM has not retained its data, an OTP mirror action is required upon
waking up the system.