Datasheet

CLASSIFICATION
PRODUCT SPECIFICATION
No.
DS-1740-2400-102
REV.
1.2
SUBJECT
CLASS 2 BLUETOOTH LOW ENERGY
SINGLE MODE MODULE
PAGE
11 of 34
PANASONIC’S CODE
ENW89846A1KF
DATE
22.04.2014
PANASONIC INDUSTRIAL DEVICES EUROPE GMBH
www.pideu.panasonic.de
8.2 SPI+
This interface supports a subset of the Serial Peripheral Interface SPI. The serial interface
can transmit and receive 8, 16 or 32 bits in master/slave mode and transmit 9 bits in master
mode. The SPI+ interface has enhanced functionality with bidirectional 2x16-bit word FIFOs.
SPI™ is a trademark of Motorola, Inc.
Features
Slave and Master mode
8 bit, 9 bit, 16 bit or 32 bit operation
Clock speeds up to 16 MHz. Programmable output frequencies of SPI source clock
divided by 1, 2, 4, 8
SPI mode 0, 1, 2, 3 support. (clock edge and phase)
Programmable SPI_DO idle level
Maskable Interrupt generation
Bus load reduction by unidirectional writes-only and reads-only modes.
Built-in RX/TX FIFOs for continuous SPI bursts.
8.3 I
2
C
The I
2
C is a programmable control bus that provides support for the communications link
between Integrated Circuits in a system. It is a simple two-wire bus with a software-defined
protocol for system control, which is used in temperature sensors and voltage level translators
to EEPROMs, general-purpose I/O, A/D and D/A converters.
Features
Two-wire I
2
C serial interface consists of a serial data line (SDA) and a serial clock
(SCL)
Two speeds are supported:
Standard mode (0 to 100 Kb/s)
Fast mode (<= 400 Kb/s)
Clock synchronization
32 deep transmit/receive FIFOs
Master transmit, Master receive operation
7 or 10-bit addressing
7 or 10-bit combined format transfers
Bulk transmit mode
Default slave address of 0x055
Interrupt or polled-mode operation
Handles Bit and Byte waiting at both bus speeds
Programmable SDA hold time