User's Manual

System Configuration Registers Maps and Registers
SPARC/CPU−56T 135
Address: 1FF.F160.01FF
16
Table 49: I2C 2 Register
Bit Name Description Defaulta Access
0 I
2
C−DATAIN2 This register bit reflects the current status of the I
2
C−2
data line.
0: I
2
C−2 dataline is 0.
1: I
2
C−2 dataline is 1.
− r
1I
2
C−CLK2 This bit corresponds to the I
2
C clock line and must be
set by software to toggle the I
2
C clock.
0: I
2
C−2 clock is 0.
1: I
2
C−2 clock is 1.
−w
2I
2
C−DATAOUT2 This bit is used by software to write to the I
2
C
dataline.a
0: The I
2
C−2 dataline is driven low.
1: The I
2
C−2 dataline is driven high by an external
pull−up.
1 r/w
7..3 − Reserved 00000
2
r/w